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Feature Request: format comments #17

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IchBinMatz opened this issue Apr 22, 2021 · 0 comments
Open

Feature Request: format comments #17

IchBinMatz opened this issue Apr 22, 2021 · 0 comments

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@IchBinMatz
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Hello, I love this extension. It produces beautiful formatted code.

I have one feature request:

sometimes i add comments to ports but need more than one line.

the output should look like this:

  STARTUP_SPARTAN6_inst : STARTUP_SPARTAN6
  PORT MAP(
    CFGCLK    => OPEN,  -- 1-bit Configuration logic main clock output.
                        -- This signal outputs the clock associated with the current
                        -- configuration mode.
    CFGMCLK   => OPEN,  -- 1-bit Configuration internal oscillator clock output.
    EOS       => eos_s, -- 1-bit Active high output signal indicates the End Of Configuration.
    clk       => '1',   -- 1-bit User startup-clock input
    GSR       => '0',   -- 1-bit Global Set/Reset input (GSR cannot be used for the port name)
                        -- When this input is asserted, all flip-flops are restored to their
                        -- initial value
    GTS       => '0',   -- 1-bit Global 3-state input (GTS cannot be used for the port name)
                        -- When this input is asserted, all user I/Os are 3-stated.
    KEYCLEARB => '0'    -- 1-bit Clear AES Decrypter Key input from Battery-Backed RAM (BBRAM)
                        -- Clear the battery-backed RAM key when it is set.
                        -- This signal needs to stay Low for 200ns to enable KEYCLEAR function
  );

but currently it looks like this:

STARTUP_SPARTAN6_inst : STARTUP_SPARTAN6
  PORT MAP(
    CFGCLK => OPEN, -- 1-bit Configuration logic main clock output.
    -- This signal outputs the clock associated with the current
    -- configuration mode.
    CFGMCLK => OPEN,  -- 1-bit Configuration internal oscillator clock output.
    EOS     => eos_s, -- 1-bit Active high output signal indicates the End Of Configuration.
    clk     => '1',   -- 1-bit User startup-clock input
    GSR     => '0',   -- 1-bit Global Set/Reset input (GSR cannot be used for the port name)
    -- When this input is asserted, all flip-flops are restored to their
    -- initial value
    GTS => '0', -- 1-bit Global 3-state input (GTS cannot be used for the port name)
    -- When this input is asserted, all user I/Os are 3-stated.
    KEYCLEARB => '0' -- 1-bit Clear AES Decrypter Key input from Battery-Backed RAM (BBRAM)
    -- Clear the battery-backed RAM key when it is set.
    -- This signal needs to stay Low for 200ns to enable KEYCLEAR function
  );

the ports that are directly benath each other share the same alignement, but if there is a line between them a new alignement is created.

I would love to see, that the comments are alignet too

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