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Implementation of an Atari ST in VHDL for Xilinx-based FPGAs

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zeST - An implementation of an Atari ST in VHDL

Copyright (c) 2019-2022 by François Galea (fgalea à free.fr)

This is a complete implementation of an Atari ST in VHDL, which targets cheap Xilinx Zynq-7000-based prototyping boards.

Its main features are:

  • Cycle accuracy, whenever possible (and necessary)
  • HDMI for video and audio output
  • USB for keyboard, mouse input (planned: joysticks, mass storage, MIDI...).

External hardware cores zeST is based on:

All other components have been redesigned from scratch.

zeST is distributed under the GNU General Public License v3 licence. See the LICENSE file or https://www.gnu.org/licenses/gpl-3.0.html for more details.

Contributors

  • François Galea
  • George Nakos

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Implementation of an Atari ST in VHDL for Xilinx-based FPGAs

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  • VHDL 48.1%
  • Tcl 23.1%
  • C 11.6%
  • SWIG 11.1%
  • Verilog 4.1%
  • Assembly 1.1%
  • Other 0.9%