diff --git a/arduino-hal/src/port/diecimila.rs b/arduino-hal/src/port/diecimila.rs
index 217d384894..a264172774 100644
--- a/arduino-hal/src/port/diecimila.rs
+++ b/arduino-hal/src/port/diecimila.rs
@@ -1,12 +1,10 @@
-pub use atmega_hal::port::{mode, Pin, PinOps, PinMode};
+pub use atmega_hal::port::{mode, Pin, PinMode, PinOps};
 
 avr_hal_generic::renamed_pins! {
-    type Pin = Pin;
-
     /// Pins of the **Arduino Diecimila**.
     ///
     /// This struct is best initialized via the [`arduino_hal::pins!()`][crate::pins] macro.
-    pub struct Pins from atmega_hal::Pins {
+    pub struct Pins {
         /// `A0`
         ///
         /// * ADC0 (ADC input channel 0)
@@ -125,4 +123,9 @@ avr_hal_generic::renamed_pins! {
         /// * L LED on Arduino Uno
         pub d13: atmega_hal::port::PB5 = pb5,
     }
+
+    impl Pins {
+        type Pin = Pin;
+        type McuPins = atmega_hal::Pins;
+    }
 }
diff --git a/arduino-hal/src/port/leonardo.rs b/arduino-hal/src/port/leonardo.rs
index 4bd5c4cfdc..c25b5a89b9 100644
--- a/arduino-hal/src/port/leonardo.rs
+++ b/arduino-hal/src/port/leonardo.rs
@@ -1,12 +1,10 @@
-pub use atmega_hal::port::{mode, Pin, PinOps, PinMode};
+pub use atmega_hal::port::{mode, Pin, PinMode, PinOps};
 
 avr_hal_generic::renamed_pins! {
-    type Pin = Pin;
-
     /// Pins of the **Arduino Leonardo**.
     ///
     /// This struct is best initialized via the [`arduino_hal::pins!()`][crate::pins] macro.
-    pub struct Pins from atmega_hal::Pins {
+    pub struct Pins {
         /// `D0` / `RX`
         ///
         /// * `RX` (UART)
@@ -121,4 +119,9 @@ avr_hal_generic::renamed_pins! {
         /// * `ADC0` channel
         pub a5: atmega_hal::port::PF0 = pf0,
     }
+
+    impl Pins {
+        type Pin = Pin;
+        type McuPins = atmega_hal::Pins;
+    }
 }
diff --git a/arduino-hal/src/port/mega.rs b/arduino-hal/src/port/mega.rs
index 185343766d..fa64d02579 100644
--- a/arduino-hal/src/port/mega.rs
+++ b/arduino-hal/src/port/mega.rs
@@ -1,17 +1,15 @@
-pub use atmega_hal::port::{mode, Pin, PinOps, PinMode};
+pub use atmega_hal::port::{mode, Pin, PinMode, PinOps};
 
 avr_hal_generic::renamed_pins! {
-    type Pin = Pin;
-
     /// Pins of the **Arduino Mega 2560** and **Arduino Mega 1280**.
-    /// 
+    ///
     /// mega1280:
     ///     https://www.arduino.cc/en/uploads/Main/arduino-mega-schematic.pdf
     /// mega2560:
     ///     https://www.arduino.cc/en/uploads/Main/arduino-mega2560-schematic.pdf
-    /// 
+    ///
     /// This struct is best initialized via the [`arduino_hal::pins!()`][crate::pins] macro.
-    pub struct Pins from atmega_hal::Pins {
+    pub struct Pins {
         /// `D0` / `RX0`
         ///
         /// * `RXD0` (USART0)
@@ -337,4 +335,9 @@ avr_hal_generic::renamed_pins! {
         /// * `PCINT23`: External Interrupt (Pin Change)
         pub a15: atmega_hal::port::PK7 = pk7,
     }
+
+    impl Pins {
+        type Pin = Pin;
+        type McuPins = atmega_hal::Pins;
+    }
 }
diff --git a/arduino-hal/src/port/promicro.rs b/arduino-hal/src/port/promicro.rs
index 3881aa82d1..5870749c47 100644
--- a/arduino-hal/src/port/promicro.rs
+++ b/arduino-hal/src/port/promicro.rs
@@ -1,12 +1,10 @@
-pub use atmega_hal::port::{mode, Pin, PinOps, PinMode};
+pub use atmega_hal::port::{mode, Pin, PinMode, PinOps};
 
 avr_hal_generic::renamed_pins! {
-    type Pin = Pin;
-
     /// Pins of the **SparkFun ProMicro**.
     ///
     /// This struct is best initialized via the [`arduino_hal::pins!()`][crate::pins] macro.
-    pub struct Pins from atmega_hal::Pins {
+    pub struct Pins {
         /// `RX`
         ///
         /// `RX` (UART)
@@ -74,4 +72,9 @@ avr_hal_generic::renamed_pins! {
         /// `ADC4` channel
         pub a3: atmega_hal::port::PF4 = pf4,
     }
+
+    impl Pins {
+        type Pin = Pin;
+        type McuPins = atmega_hal::Pins;
+    }
 }
diff --git a/arduino-hal/src/port/trinket.rs b/arduino-hal/src/port/trinket.rs
index b6b6e6321b..7a5b2debf1 100644
--- a/arduino-hal/src/port/trinket.rs
+++ b/arduino-hal/src/port/trinket.rs
@@ -1,18 +1,21 @@
-pub use attiny_hal::port::{mode, Pin, PinOps, PinMode};
+pub use attiny_hal::port::{mode, Pin, PinMode, PinOps};
 
 avr_hal_generic::renamed_pins! {
-    type Pin = Pin;
+    pub struct Pins {
+        /// `#0`: `PB0`, `DI`(SPI), `SDA`(I2C)
+        pub d0: attiny_hal::port::PB0 = pb0,
+        /// `#1`: `PB1`, `DO`(SPI), Builtin LED
+        pub d1: attiny_hal::port::PB1 = pb1,
+        /// `#2`: `PB2`, `SCK`(SPI), `SCL`(I2C)
+        pub d2: attiny_hal::port::PB2 = pb2,
+        /// `#3`: `PB3`
+        pub d3: attiny_hal::port::PB3 = pb3,
+        /// `#4`: `PB4`
+        pub d4: attiny_hal::port::PB4 = pb4,
+    }
 
-    pub struct Pins from attiny_hal::Pins {
-     /// `#0`: `PB0`, `DI`(SPI), `SDA`(I2C)
-     pub d0: attiny_hal::port::PB0 = pb0,
-     /// `#1`: `PB1`, `DO`(SPI), Builtin LED
-     pub d1: attiny_hal::port::PB1 = pb1,
-     /// `#2`: `PB2`, `SCK`(SPI), `SCL`(I2C)
-     pub d2: attiny_hal::port::PB2 = pb2,
-     /// `#3`: `PB3`
-     pub d3: attiny_hal::port::PB3 = pb3,
-     /// `#4`: `PB4`
-     pub d4: attiny_hal::port::PB4 = pb4,
+    impl Pins {
+        type Pin = Pin;
+        type McuPins = attiny_hal::Pins;
     }
 }
diff --git a/arduino-hal/src/port/trinket_pro.rs b/arduino-hal/src/port/trinket_pro.rs
index fdffe301ae..71792a6a68 100644
--- a/arduino-hal/src/port/trinket_pro.rs
+++ b/arduino-hal/src/port/trinket_pro.rs
@@ -1,12 +1,10 @@
-pub use atmega_hal::port::{mode, Pin, PinOps, PinMode};
+pub use atmega_hal::port::{mode, Pin, PinMode, PinOps};
 
 avr_hal_generic::renamed_pins! {
-    type Pin = Pin;
-
     /// Pins of the **Trinket Pro**.
     ///
     /// This struct is best initialized via the [`arduino_hal::pins!()`][crate::pins] macro.
-    pub struct Pins from atmega_hal::Pins {
+    pub struct Pins {
         /// `A0`
         ///
         /// * ADC0 (ADC input channel 0)
@@ -115,4 +113,9 @@ avr_hal_generic::renamed_pins! {
         /// * L LED on Trinket Pro
         pub d13: atmega_hal::port::PB5 = pb5,
     }
+
+    impl Pins {
+        type Pin = Pin;
+        type McuPins = atmega_hal::Pins;
+    }
 }
diff --git a/arduino-hal/src/port/uno.rs b/arduino-hal/src/port/uno.rs
index 0894bf2863..c3b53c9bba 100644
--- a/arduino-hal/src/port/uno.rs
+++ b/arduino-hal/src/port/uno.rs
@@ -1,12 +1,10 @@
-pub use atmega_hal::port::{mode, Pin, PinOps, PinMode};
+pub use atmega_hal::port::{mode, Pin, PinMode, PinOps};
 
 avr_hal_generic::renamed_pins! {
-    type Pin = Pin;
-
     /// Pins of the **Arduino Uno**, **Arduino Nano**, and **SparkFun ProMini 5V (16MHz)**.
     ///
     /// This struct is best initialized via the [`arduino_hal::pins!()`][crate::pins] macro.
-    pub struct Pins from atmega_hal::Pins {
+    pub struct Pins {
         /// `A0`
         ///
         /// * ADC0 (ADC input channel 0)
@@ -125,4 +123,9 @@ avr_hal_generic::renamed_pins! {
         /// * L LED on Arduino Uno
         pub d13: atmega_hal::port::PB5 = pb5,
     }
+
+    impl Pins {
+        type Pin = Pin;
+        type McuPins = atmega_hal::Pins;
+    }
 }
diff --git a/avr-hal-generic/src/port.rs b/avr-hal-generic/src/port.rs
index 676602c68b..1786703323 100644
--- a/avr-hal-generic/src/port.rs
+++ b/avr-hal-generic/src/port.rs
@@ -463,15 +463,9 @@ impl<PIN: PinOps> Pin<mode::Analog, PIN> {
 #[macro_export]
 macro_rules! impl_port_traditional {
     (
-        enum Ports {
-            $($PortName:ident: ($Port:ty, $port_port_reg:ident, $port_pin_reg:ident, $port_ddr_reg:ident),)+
-        }
-
         $(#[$pins_attr:meta])*
-        pub struct Pins {
-            $($pin:ident: $Pin:ident = ($PinPort:ty, $PinPortName:ident, $pin_num:expr,
-                                        $pin_port_reg:ident, $pin_pin_reg:ident,
-                                        $pin_ddr_reg:ident),)+
+        enum Ports {
+            $($name:ident: $port:ty = [$($pin:literal),+],)+
         }
     ) => {
         /// Type-alias for a pin type which can represent any concrete pin.
@@ -482,29 +476,33 @@ macro_rules! impl_port_traditional {
         /// "dynamic" type.  Do note, however, that using this dynamic type has a runtime cost.
         pub type Pin<MODE, PIN = Dynamic> = $crate::port::Pin<MODE, PIN>;
 
-        $(#[$pins_attr])*
-        pub struct Pins {
-            $(pub $pin: Pin<
-                mode::Input<mode::Floating>,
-                $Pin,
-            >,)+
-        }
+        $crate::paste::paste! {
+            $(#[$pins_attr])*
+            pub struct Pins {
+                $($(pub [<p $name:lower $pin>]: Pin<
+                    mode::Input<mode::Floating>,
+                    [<P $name $pin>],
+                >,)+)+
+            }
 
-        impl Pins {
-            pub fn new(
-                $(_: $Port,)+
-            ) -> Self {
-                Self {
-                    $($pin: $crate::port::Pin::new(
-                        $Pin { _private: (), }
-                    ),)+
+            impl Pins {
+                pub fn new(
+                    $(_: $port,)+
+                ) -> Self {
+                    Self {
+                        $($([<p $name:lower $pin>]: $crate::port::Pin::new(
+                            [<P $name $pin>] { _private: (), }
+                        ),)+)+
+                    }
                 }
             }
         }
 
-        #[repr(u8)]
-        pub enum DynamicPort {
-            $($PortName,)+
+        $crate::paste::paste! {
+            #[repr(u8)]
+            pub enum DynamicPort {
+                $([<PORT $name>]),+
+            }
         }
 
         pub struct Dynamic {
@@ -523,135 +521,74 @@ macro_rules! impl_port_traditional {
             }
         }
 
-        impl $crate::port::PinOps for Dynamic {
-            type Dynamic = Self;
-
-            #[inline]
-            fn into_dynamic(self) -> Self::Dynamic {
-                self
-            }
-
-            #[inline]
-            unsafe fn out_set(&mut self) {
-                match self.port {
-                    $(DynamicPort::$PortName => (*<$Port>::ptr()).$port_port_reg.modify(|r, w| {
-                        w.bits(r.bits() | self.mask)
-                    }),)+
-                }
-            }
-
-            #[inline]
-            unsafe fn out_clear(&mut self) {
-                match self.port {
-                    $(DynamicPort::$PortName => (*<$Port>::ptr()).$port_port_reg.modify(|r, w| {
-                        w.bits(r.bits() & !self.mask)
-                    }),)+
-                }
-            }
-
-            #[inline]
-            unsafe fn out_toggle(&mut self) {
-                match self.port {
-                    $(DynamicPort::$PortName => (*<$Port>::ptr()).$port_pin_reg.write(|w| {
-                        w.bits(self.mask)
-                    }),)+
-                }
-            }
-
-            #[inline]
-            unsafe fn out_get(&self) -> bool {
-                match self.port {
-                    $(DynamicPort::$PortName => (*<$Port>::ptr()).$port_port_reg.read().bits()
-                        & self.mask != 0,)+
-                }
-            }
-
-            #[inline]
-            unsafe fn in_get(&self) -> bool {
-                match self.port {
-                    $(DynamicPort::$PortName => (*<$Port>::ptr()).$port_pin_reg.read().bits()
-                        & self.mask != 0,)+
-                }
-            }
-
-            #[inline]
-            unsafe fn make_output(&mut self) {
-                match self.port {
-                    $(DynamicPort::$PortName => (*<$Port>::ptr()).$port_ddr_reg.modify(|r, w| {
-                        w.bits(r.bits() | self.mask)
-                    }),)+
-                }
-            }
-
-            #[inline]
-            unsafe fn make_input(&mut self, pull_up: bool) {
-                match self.port {
-                    $(DynamicPort::$PortName => (*<$Port>::ptr()).$port_ddr_reg.modify(|r, w| {
-                        w.bits(r.bits() & !self.mask)
-                    }),)+
-                }
-                if pull_up {
-                    self.out_set()
-                } else {
-                    self.out_clear()
-                }
-            }
-        }
-
-        $(
-            pub struct $Pin {
-                _private: ()
-            }
-
-            impl $crate::port::PinOps for $Pin {
-                type Dynamic = Dynamic;
+        $crate::paste::paste! {
+            impl $crate::port::PinOps for Dynamic {
+                type Dynamic = Self;
 
                 #[inline]
                 fn into_dynamic(self) -> Self::Dynamic {
-                    Dynamic::new(DynamicPort::$PinPortName, $pin_num)
+                    self
                 }
 
                 #[inline]
                 unsafe fn out_set(&mut self) {
-                    (*<$PinPort>::ptr()).$pin_port_reg.modify(|r, w| {
-                        w.bits(r.bits() | (1 << $pin_num))
-                    })
+                    match self.port {
+                        $(DynamicPort::[<PORT $name>] => (*<$port>::ptr()).[<port $name:lower>].modify(|r, w| {
+                            w.bits(r.bits() | self.mask)
+                        }),)+
+                    }
                 }
 
                 #[inline]
                 unsafe fn out_clear(&mut self) {
-                    (*<$PinPort>::ptr()).$pin_port_reg.modify(|r, w| {
-                        w.bits(r.bits() & !(1 << $pin_num))
-                    })
+                    match self.port {
+                        $(DynamicPort::[<PORT $name>] => (*<$port>::ptr()).[<port $name:lower>].modify(|r, w| {
+                            w.bits(r.bits() & !self.mask)
+                        }),)+
+                    }
                 }
 
                 #[inline]
                 unsafe fn out_toggle(&mut self) {
-                    (*<$PinPort>::ptr()).$pin_pin_reg.write(|w| w.bits(1 << $pin_num))
+                    match self.port {
+                        $(DynamicPort::[<PORT $name>] => (*<$port>::ptr()).[<port $name:lower>].write(|w| {
+                            w.bits(self.mask)
+                        }),)+
+                    }
                 }
 
                 #[inline]
                 unsafe fn out_get(&self) -> bool {
-                    (*<$PinPort>::ptr()).$pin_port_reg.read().bits() & (1 << $pin_num) != 0
+                    match self.port {
+                        $(DynamicPort::[<PORT $name>] => (*<$port>::ptr()).[<port $name:lower>].read().bits()
+                            & self.mask != 0,)+
+                    }
                 }
 
                 #[inline]
                 unsafe fn in_get(&self) -> bool {
-                    (*<$PinPort>::ptr()).$pin_pin_reg.read().bits() & (1 << $pin_num) != 0
+                    match self.port {
+                        $(DynamicPort::[<PORT $name>] => (*<$port>::ptr()).[<pin $name:lower>].read().bits()
+                            & self.mask != 0,)+
+                    }
                 }
 
                 #[inline]
                 unsafe fn make_output(&mut self) {
-                    (*<$PinPort>::ptr()).$pin_ddr_reg.modify(|r, w| {
-                        w.bits(r.bits() | (1 << $pin_num))
-                    })
+                    match self.port {
+                        $(DynamicPort::[<PORT $name>] => (*<$port>::ptr()).[<ddr $name:lower>].modify(|r, w| {
+                            w.bits(r.bits() | self.mask)
+                        }),)+
+                    }
                 }
 
                 #[inline]
                 unsafe fn make_input(&mut self, pull_up: bool) {
-                    (*<$PinPort>::ptr()).$pin_ddr_reg.modify(|r, w| {
-                        w.bits(r.bits() & !(1 << $pin_num))
-                    });
+                    match self.port {
+                        $(DynamicPort::[<PORT $name>] => (*<$port>::ptr()).[<ddr $name:lower>].modify(|r, w| {
+                            w.bits(r.bits() & !self.mask)
+                        }),)+
+                    }
                     if pull_up {
                         self.out_set()
                     } else {
@@ -659,33 +596,101 @@ macro_rules! impl_port_traditional {
                     }
                 }
             }
-        )+
+        }
+
+        $crate::paste::paste! {
+            $($(
+                pub struct [<P $name $pin>] {
+                    _private: ()
+                }
+
+                impl $crate::port::PinOps for [<P $name $pin>] {
+                    type Dynamic = Dynamic;
+
+                    #[inline]
+                    fn into_dynamic(self) -> Self::Dynamic {
+                        Dynamic::new(DynamicPort::[<PORT $name>], $pin)
+                    }
+
+                    #[inline]
+                    unsafe fn out_set(&mut self) {
+                        (*<$port>::ptr()).[<port $name:lower>].modify(|r, w| {
+                            w.bits(r.bits() | (1 << $pin))
+                        })
+                    }
+
+                    #[inline]
+                    unsafe fn out_clear(&mut self) {
+                        (*<$port>::ptr()).[<port $name:lower>].modify(|r, w| {
+                            w.bits(r.bits() & !(1 << $pin))
+                        })
+                    }
+
+                    #[inline]
+                    unsafe fn out_toggle(&mut self) {
+                        (*<$port>::ptr()).[<pin $name:lower>].write(|w| w.bits(1 << $pin))
+                    }
+
+                    #[inline]
+                    unsafe fn out_get(&self) -> bool {
+                        (*<$port>::ptr()).[<port $name:lower>].read().bits() & (1 << $pin) != 0
+                    }
+
+                    #[inline]
+                    unsafe fn in_get(&self) -> bool {
+                        (*<$port>::ptr()).[<pin $name:lower>].read().bits() & (1 << $pin) != 0
+                    }
+
+                    #[inline]
+                    unsafe fn make_output(&mut self) {
+                        (*<$port>::ptr()).[<ddr $name:lower>].modify(|r, w| {
+                            w.bits(r.bits() | (1 << $pin))
+                        })
+                    }
+
+                    #[inline]
+                    unsafe fn make_input(&mut self, pull_up: bool) {
+                        (*<$port>::ptr()).[<ddr $name:lower>].modify(|r, w| {
+                            w.bits(r.bits() & !(1 << $pin))
+                        });
+                        if pull_up {
+                            self.out_set()
+                        } else {
+                            self.out_clear()
+                        }
+                    }
+                }
+            )+)+
+        }
     };
 }
 
 #[macro_export]
 macro_rules! renamed_pins {
     (
-        type Pin = $PinType:ident;
-
         $(#[$pins_attr:meta])*
-        pub struct Pins from $McuPins:ty {
-            $($(#[$pin_attr:meta])* pub $pin:ident: $Pin:ty = $pin_orig:ident,)+
+        pub struct Pins {
+            $($(#[$pin_attr:meta])* pub $pin_name:ident: $pin_type:ty = $pin_orig:ident,)+
+        }
+
+        impl Pins {
+            type Pin = $pin_wrapper:ident;
+            type McuPins = $mcu_pins:ty;
         }
     ) => {
         $(#[$pins_attr])*
         pub struct Pins {
             $($(#[$pin_attr])*
-            pub $pin: $PinType<
+            pub $pin_name: $pin_wrapper<
                 $crate::port::mode::Input<$crate::port::mode::Floating>,
-                $Pin,
+                $pin_type,
             >,)+
         }
 
         impl Pins {
-            pub fn with_mcu_pins(pins: $McuPins) -> Self {
+            pub fn with_mcu_pins(pins: $mcu_pins) -> Self {
                 Self {
-                    $($pin: pins.$pin_orig,)+
+                    $($pin_name: pins.$pin_orig,)+
                 }
             }
         }
diff --git a/mcu/atmega-hal/src/port.rs b/mcu/atmega-hal/src/port.rs
index 9cf4561df6..d639c23abb 100644
--- a/mcu/atmega-hal/src/port.rs
+++ b/mcu/atmega-hal/src/port.rs
@@ -1,373 +1,80 @@
-pub use avr_hal_generic::port::{mode, PinOps, PinMode};
+pub use avr_hal_generic::port::{mode, PinMode, PinOps};
 
 #[cfg(any(feature = "atmega48p", feature = "atmega168", feature = "atmega328p"))]
 avr_hal_generic::impl_port_traditional! {
     enum Ports {
-        PORTB: (crate::pac::PORTB, portb, pinb, ddrb),
-        PORTC: (crate::pac::PORTC, portc, pinc, ddrc),
-        PORTD: (crate::pac::PORTD, portd, pind, ddrd),
-    }
-
-    pub struct Pins {
-        pb0: PB0 = (crate::pac::PORTB, PORTB, 0, portb, pinb, ddrb),
-        pb1: PB1 = (crate::pac::PORTB, PORTB, 1, portb, pinb, ddrb),
-        pb2: PB2 = (crate::pac::PORTB, PORTB, 2, portb, pinb, ddrb),
-        pb3: PB3 = (crate::pac::PORTB, PORTB, 3, portb, pinb, ddrb),
-        pb4: PB4 = (crate::pac::PORTB, PORTB, 4, portb, pinb, ddrb),
-        pb5: PB5 = (crate::pac::PORTB, PORTB, 5, portb, pinb, ddrb),
-        pb6: PB6 = (crate::pac::PORTB, PORTB, 6, portb, pinb, ddrb),
-        pb7: PB7 = (crate::pac::PORTB, PORTB, 7, portb, pinb, ddrb),
-        pc0: PC0 = (crate::pac::PORTC, PORTC, 0, portc, pinc, ddrc),
-        pc1: PC1 = (crate::pac::PORTC, PORTC, 1, portc, pinc, ddrc),
-        pc2: PC2 = (crate::pac::PORTC, PORTC, 2, portc, pinc, ddrc),
-        pc3: PC3 = (crate::pac::PORTC, PORTC, 3, portc, pinc, ddrc),
-        pc4: PC4 = (crate::pac::PORTC, PORTC, 4, portc, pinc, ddrc),
-        pc5: PC5 = (crate::pac::PORTC, PORTC, 5, portc, pinc, ddrc),
-        pc6: PC6 = (crate::pac::PORTC, PORTC, 6, portc, pinc, ddrc),
-        pd0: PD0 = (crate::pac::PORTD, PORTD, 0, portd, pind, ddrd),
-        pd1: PD1 = (crate::pac::PORTD, PORTD, 1, portd, pind, ddrd),
-        pd2: PD2 = (crate::pac::PORTD, PORTD, 2, portd, pind, ddrd),
-        pd3: PD3 = (crate::pac::PORTD, PORTD, 3, portd, pind, ddrd),
-        pd4: PD4 = (crate::pac::PORTD, PORTD, 4, portd, pind, ddrd),
-        pd5: PD5 = (crate::pac::PORTD, PORTD, 5, portd, pind, ddrd),
-        pd6: PD6 = (crate::pac::PORTD, PORTD, 6, portd, pind, ddrd),
-        pd7: PD7 = (crate::pac::PORTD, PORTD, 7, portd, pind, ddrd),
+        B: crate::pac::PORTB = [0, 1, 2, 3, 4, 5, 6, 7],
+        C: crate::pac::PORTC = [0, 1, 2, 3, 4, 5, 6],
+        D: crate::pac::PORTD = [0, 1, 2, 3, 4, 5, 6, 7],
     }
 }
 
 #[cfg(feature = "atmega328pb")]
 avr_hal_generic::impl_port_traditional! {
     enum Ports {
-        PORTB: (crate::pac::PORTB, portb, pinb, ddrb),
-        PORTC: (crate::pac::PORTC, portc, pinc, ddrc),
-        PORTD: (crate::pac::PORTD, portd, pind, ddrd),
-        PORTE: (crate::pac::PORTE, porte, pine, ddre),
-    }
-
-    pub struct Pins {
-        pb0: PB0 = (crate::pac::PORTB, PORTB, 0, portb, pinb, ddrb),
-        pb1: PB1 = (crate::pac::PORTB, PORTB, 1, portb, pinb, ddrb),
-        pb2: PB2 = (crate::pac::PORTB, PORTB, 2, portb, pinb, ddrb),
-        pb3: PB3 = (crate::pac::PORTB, PORTB, 3, portb, pinb, ddrb),
-        pb4: PB4 = (crate::pac::PORTB, PORTB, 4, portb, pinb, ddrb),
-        pb5: PB5 = (crate::pac::PORTB, PORTB, 5, portb, pinb, ddrb),
-        pb6: PB6 = (crate::pac::PORTB, PORTB, 6, portb, pinb, ddrb),
-        pb7: PB7 = (crate::pac::PORTB, PORTB, 7, portb, pinb, ddrb),
-        pc0: PC0 = (crate::pac::PORTC, PORTC, 0, portc, pinc, ddrc),
-        pc1: PC1 = (crate::pac::PORTC, PORTC, 1, portc, pinc, ddrc),
-        pc2: PC2 = (crate::pac::PORTC, PORTC, 2, portc, pinc, ddrc),
-        pc3: PC3 = (crate::pac::PORTC, PORTC, 3, portc, pinc, ddrc),
-        pc4: PC4 = (crate::pac::PORTC, PORTC, 4, portc, pinc, ddrc),
-        pc5: PC5 = (crate::pac::PORTC, PORTC, 5, portc, pinc, ddrc),
-        pc6: PC6 = (crate::pac::PORTC, PORTC, 6, portc, pinc, ddrc),
-        pd0: PD0 = (crate::pac::PORTD, PORTD, 0, portd, pind, ddrd),
-        pd1: PD1 = (crate::pac::PORTD, PORTD, 1, portd, pind, ddrd),
-        pd2: PD2 = (crate::pac::PORTD, PORTD, 2, portd, pind, ddrd),
-        pd3: PD3 = (crate::pac::PORTD, PORTD, 3, portd, pind, ddrd),
-        pd4: PD4 = (crate::pac::PORTD, PORTD, 4, portd, pind, ddrd),
-        pd5: PD5 = (crate::pac::PORTD, PORTD, 5, portd, pind, ddrd),
-        pd6: PD6 = (crate::pac::PORTD, PORTD, 6, portd, pind, ddrd),
-        pd7: PD7 = (crate::pac::PORTD, PORTD, 7, portd, pind, ddrd),
-        pe0: PE0 = (crate::pac::PORTE, PORTE, 0, porte, pine, ddre),
-        pe1: PE1 = (crate::pac::PORTE, PORTE, 1, porte, pine, ddre),
-        pe2: PE2 = (crate::pac::PORTE, PORTE, 2, porte, pine, ddre),
-        pe3: PE3 = (crate::pac::PORTE, PORTE, 3, porte, pine, ddre),
+        B: crate::pac::PORTB = [0, 1, 2, 3, 4, 5, 6, 7],
+        C: crate::pac::PORTC = [0, 1, 2, 3, 4, 5, 6, 7],
+        D: crate::pac::PORTD = [0, 1, 2, 3, 4, 5, 6, 7],
+        E: crate::pac::PORTE = [0, 1, 2, 3],
     }
 }
 
 #[cfg(feature = "atmega32u4")]
 avr_hal_generic::impl_port_traditional! {
     enum Ports {
-        PORTB: (crate::pac::PORTB, portb, pinb, ddrb),
-        PORTC: (crate::pac::PORTC, portc, pinc, ddrc),
-        PORTD: (crate::pac::PORTD, portd, pind, ddrd),
-        PORTE: (crate::pac::PORTE, porte, pine, ddre),
-        PORTF: (crate::pac::PORTF, portf, pinf, ddrf),
-    }
-
-    pub struct Pins {
-        pb0: PB0 = (crate::pac::PORTB, PORTB, 0, portb, pinb, ddrb),
-        pb1: PB1 = (crate::pac::PORTB, PORTB, 1, portb, pinb, ddrb),
-        pb2: PB2 = (crate::pac::PORTB, PORTB, 2, portb, pinb, ddrb),
-        pb3: PB3 = (crate::pac::PORTB, PORTB, 3, portb, pinb, ddrb),
-        pb4: PB4 = (crate::pac::PORTB, PORTB, 4, portb, pinb, ddrb),
-        pb5: PB5 = (crate::pac::PORTB, PORTB, 5, portb, pinb, ddrb),
-        pb6: PB6 = (crate::pac::PORTB, PORTB, 6, portb, pinb, ddrb),
-        pb7: PB7 = (crate::pac::PORTB, PORTB, 7, portb, pinb, ddrb),
-        pc6: PC6 = (crate::pac::PORTC, PORTC, 6, portc, pinc, ddrc),
-        pc7: PC7 = (crate::pac::PORTC, PORTC, 7, portc, pinc, ddrc),
-        pd0: PD0 = (crate::pac::PORTD, PORTD, 0, portd, pind, ddrd),
-        pd1: PD1 = (crate::pac::PORTD, PORTD, 1, portd, pind, ddrd),
-        pd2: PD2 = (crate::pac::PORTD, PORTD, 2, portd, pind, ddrd),
-        pd3: PD3 = (crate::pac::PORTD, PORTD, 3, portd, pind, ddrd),
-        pd4: PD4 = (crate::pac::PORTD, PORTD, 4, portd, pind, ddrd),
-        pd5: PD5 = (crate::pac::PORTD, PORTD, 5, portd, pind, ddrd),
-        pd6: PD6 = (crate::pac::PORTD, PORTD, 6, portd, pind, ddrd),
-        pd7: PD7 = (crate::pac::PORTD, PORTD, 7, portd, pind, ddrd),
-        pe2: PE2 = (crate::pac::PORTE, PORTE, 2, porte, pine, ddre),
-        pe6: PE6 = (crate::pac::PORTE, PORTE, 6, porte, pine, ddre),
-        pf0: PF0 = (crate::pac::PORTF, PORTF, 0, portf, pinf, ddrf),
-        pf1: PF1 = (crate::pac::PORTF, PORTF, 1, portf, pinf, ddrf),
-        pf4: PF4 = (crate::pac::PORTF, PORTF, 4, portf, pinf, ddrf),
-        pf5: PF5 = (crate::pac::PORTF, PORTF, 5, portf, pinf, ddrf),
-        pf6: PF6 = (crate::pac::PORTF, PORTF, 6, portf, pinf, ddrf),
-        pf7: PF7 = (crate::pac::PORTF, PORTF, 7, portf, pinf, ddrf),
+        B: crate::pac::PORTB = [0, 1, 2, 3, 4, 5, 6, 7],
+        C: crate::pac::PORTC = [6, 7],
+        D: crate::pac::PORTD = [0, 1, 2, 3, 4, 5, 6, 7],
+        E: crate::pac::PORTE = [2, 6],
+        F: crate::pac::PORTF = [0, 1, 2, 3, 4, 5, 6, 7],
     }
 }
 
 #[cfg(any(feature = "atmega128a"))]
 avr_hal_generic::impl_port_traditional! {
     enum Ports {
-        PORTA: (crate::pac::PORTA, porta, pina, ddra),
-        PORTB: (crate::pac::PORTB, portb, pinb, ddrb),
-        PORTC: (crate::pac::PORTC, portc, pinc, ddrc),
-        PORTD: (crate::pac::PORTD, portd, pind, ddrd),
-        PORTE: (crate::pac::PORTE, porte, pine, ddre),
-        PORTF: (crate::pac::PORTF, portf, pinf, ddrf),
-        PORTG: (crate::pac::PORTG, portg, ping, ddrg),
-    }
-
-    pub struct Pins {
-        pa0: PA0 = (crate::pac::PORTA, PORTA, 0, porta, pina, ddra),
-        pa1: PA1 = (crate::pac::PORTA, PORTA, 1, porta, pina, ddra),
-        pa2: PA2 = (crate::pac::PORTA, PORTA, 2, porta, pina, ddra),
-        pa3: PA3 = (crate::pac::PORTA, PORTA, 3, porta, pina, ddra),
-        pa4: PA4 = (crate::pac::PORTA, PORTA, 4, porta, pina, ddra),
-        pa5: PA5 = (crate::pac::PORTA, PORTA, 5, porta, pina, ddra),
-        pa6: PA6 = (crate::pac::PORTA, PORTA, 6, porta, pina, ddra),
-        pa7: PA7 = (crate::pac::PORTA, PORTA, 7, porta, pina, ddra),
-        pb0: PB0 = (crate::pac::PORTB, PORTB, 0, portb, pinb, ddrb),
-        pb1: PB1 = (crate::pac::PORTB, PORTB, 1, portb, pinb, ddrb),
-        pb2: PB2 = (crate::pac::PORTB, PORTB, 2, portb, pinb, ddrb),
-        pb3: PB3 = (crate::pac::PORTB, PORTB, 3, portb, pinb, ddrb),
-        pb4: PB4 = (crate::pac::PORTB, PORTB, 4, portb, pinb, ddrb),
-        pb5: PB5 = (crate::pac::PORTB, PORTB, 5, portb, pinb, ddrb),
-        pb6: PB6 = (crate::pac::PORTB, PORTB, 6, portb, pinb, ddrb),
-        pb7: PB7 = (crate::pac::PORTB, PORTB, 7, portb, pinb, ddrb),
-        pc0: PC0 = (crate::pac::PORTC, PORTC, 0, portc, pinc, ddrc),
-        pc1: PC1 = (crate::pac::PORTC, PORTC, 1, portc, pinc, ddrc),
-        pc2: PC2 = (crate::pac::PORTC, PORTC, 2, portc, pinc, ddrc),
-        pc3: PC3 = (crate::pac::PORTC, PORTC, 3, portc, pinc, ddrc),
-        pc4: PC4 = (crate::pac::PORTC, PORTC, 4, portc, pinc, ddrc),
-        pc5: PC5 = (crate::pac::PORTC, PORTC, 5, portc, pinc, ddrc),
-        pc6: PC6 = (crate::pac::PORTC, PORTC, 6, portc, pinc, ddrc),
-        pc7: PC7 = (crate::pac::PORTC, PORTC, 7, portc, pinc, ddrc),
-        pd0: PD0 = (crate::pac::PORTD, PORTD, 0, portd, pind, ddrd),
-        pd1: PD1 = (crate::pac::PORTD, PORTD, 1, portd, pind, ddrd),
-        pd2: PD2 = (crate::pac::PORTD, PORTD, 2, portd, pind, ddrd),
-        pd3: PD3 = (crate::pac::PORTD, PORTD, 3, portd, pind, ddrd),
-        pd4: PD4 = (crate::pac::PORTD, PORTD, 4, portd, pind, ddrd),
-        pd5: PD5 = (crate::pac::PORTD, PORTD, 5, portd, pind, ddrd),
-        pd6: PD6 = (crate::pac::PORTD, PORTD, 6, portd, pind, ddrd),
-        pd7: PD7 = (crate::pac::PORTD, PORTD, 7, portd, pind, ddrd),
-        pe0: PE0 = (crate::pac::PORTE, PORTE, 0, porte, pine, ddre),
-        pe1: PE1 = (crate::pac::PORTE, PORTE, 1, porte, pine, ddre),
-        pe2: PE2 = (crate::pac::PORTE, PORTE, 2, porte, pine, ddre),
-        pe3: PE3 = (crate::pac::PORTE, PORTE, 3, porte, pine, ddre),
-        pe4: PE4 = (crate::pac::PORTE, PORTE, 4, porte, pine, ddre),
-        pe5: PE5 = (crate::pac::PORTE, PORTE, 5, porte, pine, ddre),
-        pe6: PE6 = (crate::pac::PORTE, PORTE, 6, porte, pine, ddre),
-        pe7: PE7 = (crate::pac::PORTE, PORTE, 7, porte, pine, ddre),
-        pf0: PF0 = (crate::pac::PORTF, PORTF, 0, portf, pinf, ddrf),
-        pf1: PF1 = (crate::pac::PORTF, PORTF, 1, portf, pinf, ddrf),
-        pf2: PF2 = (crate::pac::PORTF, PORTF, 2, portf, pinf, ddrf),
-        pf3: PF3 = (crate::pac::PORTF, PORTF, 3, portf, pinf, ddrf),
-        pf4: PF4 = (crate::pac::PORTF, PORTF, 4, portf, pinf, ddrf),
-        pf5: PF5 = (crate::pac::PORTF, PORTF, 5, portf, pinf, ddrf),
-        pf6: PF6 = (crate::pac::PORTF, PORTF, 6, portf, pinf, ddrf),
-        pf7: PF7 = (crate::pac::PORTF, PORTF, 7, portf, pinf, ddrf),
-        pg0: PG0 = (crate::pac::PORTG, PORTG, 0, portg, ping, ddrg),
-        pg1: PG1 = (crate::pac::PORTG, PORTG, 1, portg, ping, ddrg),
-        pg2: PG2 = (crate::pac::PORTG, PORTG, 2, portg, ping, ddrg),
-        pg3: PG3 = (crate::pac::PORTG, PORTG, 3, portg, ping, ddrg),
-        pg4: PG4 = (crate::pac::PORTG, PORTG, 4, portg, ping, ddrg),
-        pg5: PG5 = (crate::pac::PORTG, PORTG, 5, portg, ping, ddrg),
+        A: crate::pac::PORTA = [0, 1, 2, 3, 4, 5, 6, 7],
+        B: crate::pac::PORTB = [0, 1, 2, 3, 4, 5, 6, 7],
+        C: crate::pac::PORTC = [0, 1, 2, 3, 4, 5, 6, 7],
+        D: crate::pac::PORTD = [0, 1, 2, 3, 4, 5, 6, 7],
+        E: crate::pac::PORTE = [0, 1, 2, 3, 4, 5, 6, 7],
+        F: crate::pac::PORTF = [0, 1, 2, 3, 4, 5, 6, 7],
+        G: crate::pac::PORTG = [0, 1, 2, 3, 4, 5],
     }
 }
 
-
 #[cfg(any(feature = "atmega1280", feature = "atmega2560"))]
 avr_hal_generic::impl_port_traditional! {
     enum Ports {
-        PORTA: (crate::pac::PORTA, porta, pina, ddra),
-        PORTB: (crate::pac::PORTB, portb, pinb, ddrb),
-        PORTC: (crate::pac::PORTC, portc, pinc, ddrc),
-        PORTD: (crate::pac::PORTD, portd, pind, ddrd),
-        PORTE: (crate::pac::PORTE, porte, pine, ddre),
-        PORTF: (crate::pac::PORTF, portf, pinf, ddrf),
-        PORTG: (crate::pac::PORTG, portg, ping, ddrg),
-        PORTH: (crate::pac::PORTH, porth, pinh, ddrh),
-        PORTJ: (crate::pac::PORTJ, portj, pinj, ddrj),
-        PORTK: (crate::pac::PORTK, portk, pink, ddrk),
-        PORTL: (crate::pac::PORTL, portl, pinl, ddrl),
-    }
-
-    pub struct Pins {
-        pa0: PA0 = (crate::pac::PORTA, PORTA, 0, porta, pina, ddra),
-        pa1: PA1 = (crate::pac::PORTA, PORTA, 1, porta, pina, ddra),
-        pa2: PA2 = (crate::pac::PORTA, PORTA, 2, porta, pina, ddra),
-        pa3: PA3 = (crate::pac::PORTA, PORTA, 3, porta, pina, ddra),
-        pa4: PA4 = (crate::pac::PORTA, PORTA, 4, porta, pina, ddra),
-        pa5: PA5 = (crate::pac::PORTA, PORTA, 5, porta, pina, ddra),
-        pa6: PA6 = (crate::pac::PORTA, PORTA, 6, porta, pina, ddra),
-        pa7: PA7 = (crate::pac::PORTA, PORTA, 7, porta, pina, ddra),
-        pb0: PB0 = (crate::pac::PORTB, PORTB, 0, portb, pinb, ddrb),
-        pb1: PB1 = (crate::pac::PORTB, PORTB, 1, portb, pinb, ddrb),
-        pb2: PB2 = (crate::pac::PORTB, PORTB, 2, portb, pinb, ddrb),
-        pb3: PB3 = (crate::pac::PORTB, PORTB, 3, portb, pinb, ddrb),
-        pb4: PB4 = (crate::pac::PORTB, PORTB, 4, portb, pinb, ddrb),
-        pb5: PB5 = (crate::pac::PORTB, PORTB, 5, portb, pinb, ddrb),
-        pb6: PB6 = (crate::pac::PORTB, PORTB, 6, portb, pinb, ddrb),
-        pb7: PB7 = (crate::pac::PORTB, PORTB, 7, portb, pinb, ddrb),
-        pc0: PC0 = (crate::pac::PORTC, PORTC, 0, portc, pinc, ddrc),
-        pc1: PC1 = (crate::pac::PORTC, PORTC, 1, portc, pinc, ddrc),
-        pc2: PC2 = (crate::pac::PORTC, PORTC, 2, portc, pinc, ddrc),
-        pc3: PC3 = (crate::pac::PORTC, PORTC, 3, portc, pinc, ddrc),
-        pc4: PC4 = (crate::pac::PORTC, PORTC, 4, portc, pinc, ddrc),
-        pc5: PC5 = (crate::pac::PORTC, PORTC, 5, portc, pinc, ddrc),
-        pc6: PC6 = (crate::pac::PORTC, PORTC, 6, portc, pinc, ddrc),
-        pc7: PC7 = (crate::pac::PORTC, PORTC, 7, portc, pinc, ddrc),
-        pd0: PD0 = (crate::pac::PORTD, PORTD, 0, portd, pind, ddrd),
-        pd1: PD1 = (crate::pac::PORTD, PORTD, 1, portd, pind, ddrd),
-        pd2: PD2 = (crate::pac::PORTD, PORTD, 2, portd, pind, ddrd),
-        pd3: PD3 = (crate::pac::PORTD, PORTD, 3, portd, pind, ddrd),
-        pd4: PD4 = (crate::pac::PORTD, PORTD, 4, portd, pind, ddrd),
-        pd5: PD5 = (crate::pac::PORTD, PORTD, 5, portd, pind, ddrd),
-        pd6: PD6 = (crate::pac::PORTD, PORTD, 6, portd, pind, ddrd),
-        pd7: PD7 = (crate::pac::PORTD, PORTD, 7, portd, pind, ddrd),
-        pe0: PE0 = (crate::pac::PORTE, PORTE, 0, porte, pine, ddre),
-        pe1: PE1 = (crate::pac::PORTE, PORTE, 1, porte, pine, ddre),
-        pe2: PE2 = (crate::pac::PORTE, PORTE, 2, porte, pine, ddre),
-        pe3: PE3 = (crate::pac::PORTE, PORTE, 3, porte, pine, ddre),
-        pe4: PE4 = (crate::pac::PORTE, PORTE, 4, porte, pine, ddre),
-        pe5: PE5 = (crate::pac::PORTE, PORTE, 5, porte, pine, ddre),
-        pe6: PE6 = (crate::pac::PORTE, PORTE, 6, porte, pine, ddre),
-        pe7: PE7 = (crate::pac::PORTE, PORTE, 7, porte, pine, ddre),
-        pf0: PF0 = (crate::pac::PORTF, PORTF, 0, portf, pinf, ddrf),
-        pf1: PF1 = (crate::pac::PORTF, PORTF, 1, portf, pinf, ddrf),
-        pf2: PF2 = (crate::pac::PORTF, PORTF, 2, portf, pinf, ddrf),
-        pf3: PF3 = (crate::pac::PORTF, PORTF, 3, portf, pinf, ddrf),
-        pf4: PF4 = (crate::pac::PORTF, PORTF, 4, portf, pinf, ddrf),
-        pf5: PF5 = (crate::pac::PORTF, PORTF, 5, portf, pinf, ddrf),
-        pf6: PF6 = (crate::pac::PORTF, PORTF, 6, portf, pinf, ddrf),
-        pf7: PF7 = (crate::pac::PORTF, PORTF, 7, portf, pinf, ddrf),
-        pg0: PG0 = (crate::pac::PORTG, PORTG, 0, portg, ping, ddrg),
-        pg1: PG1 = (crate::pac::PORTG, PORTG, 1, portg, ping, ddrg),
-        pg2: PG2 = (crate::pac::PORTG, PORTG, 2, portg, ping, ddrg),
-        pg3: PG3 = (crate::pac::PORTG, PORTG, 3, portg, ping, ddrg),
-        pg4: PG4 = (crate::pac::PORTG, PORTG, 4, portg, ping, ddrg),
-        pg5: PG5 = (crate::pac::PORTG, PORTG, 5, portg, ping, ddrg),
-        ph0: PH0 = (crate::pac::PORTH, PORTH, 0, porth, pinh, ddrh),
-        ph1: PH1 = (crate::pac::PORTH, PORTH, 1, porth, pinh, ddrh),
-        ph2: PH2 = (crate::pac::PORTH, PORTH, 2, porth, pinh, ddrh),
-        ph3: PH3 = (crate::pac::PORTH, PORTH, 3, porth, pinh, ddrh),
-        ph4: PH4 = (crate::pac::PORTH, PORTH, 4, porth, pinh, ddrh),
-        ph5: PH5 = (crate::pac::PORTH, PORTH, 5, porth, pinh, ddrh),
-        ph6: PH6 = (crate::pac::PORTH, PORTH, 6, porth, pinh, ddrh),
-        ph7: PH7 = (crate::pac::PORTH, PORTH, 7, porth, pinh, ddrh),
-        pj0: PJ0 = (crate::pac::PORTJ, PORTJ, 0, portj, pinj, ddrj),
-        pj1: PJ1 = (crate::pac::PORTJ, PORTJ, 1, portj, pinj, ddrj),
-        pj2: PJ2 = (crate::pac::PORTJ, PORTJ, 2, portj, pinj, ddrj),
-        pj3: PJ3 = (crate::pac::PORTJ, PORTJ, 3, portj, pinj, ddrj),
-        pj4: PJ4 = (crate::pac::PORTJ, PORTJ, 4, portj, pinj, ddrj),
-        pj5: PJ5 = (crate::pac::PORTJ, PORTJ, 5, portj, pinj, ddrj),
-        pj6: PJ6 = (crate::pac::PORTJ, PORTJ, 6, portj, pinj, ddrj),
-        pj7: PJ7 = (crate::pac::PORTJ, PORTJ, 7, portj, pinj, ddrj),
-        pk0: PK0 = (crate::pac::PORTK, PORTK, 0, portk, pink, ddrk),
-        pk1: PK1 = (crate::pac::PORTK, PORTK, 1, portk, pink, ddrk),
-        pk2: PK2 = (crate::pac::PORTK, PORTK, 2, portk, pink, ddrk),
-        pk3: PK3 = (crate::pac::PORTK, PORTK, 3, portk, pink, ddrk),
-        pk4: PK4 = (crate::pac::PORTK, PORTK, 4, portk, pink, ddrk),
-        pk5: PK5 = (crate::pac::PORTK, PORTK, 5, portk, pink, ddrk),
-        pk6: PK6 = (crate::pac::PORTK, PORTK, 6, portk, pink, ddrk),
-        pk7: PK7 = (crate::pac::PORTK, PORTK, 7, portk, pink, ddrk),
-        pl0: PL0 = (crate::pac::PORTL, PORTL, 0, portl, pinl, ddrl),
-        pl1: PL1 = (crate::pac::PORTL, PORTL, 1, portl, pinl, ddrl),
-        pl2: PL2 = (crate::pac::PORTL, PORTL, 2, portl, pinl, ddrl),
-        pl3: PL3 = (crate::pac::PORTL, PORTL, 3, portl, pinl, ddrl),
-        pl4: PL4 = (crate::pac::PORTL, PORTL, 4, portl, pinl, ddrl),
-        pl5: PL5 = (crate::pac::PORTL, PORTL, 5, portl, pinl, ddrl),
-        pl6: PL6 = (crate::pac::PORTL, PORTL, 6, portl, pinl, ddrl),
-        pl7: PL7 = (crate::pac::PORTL, PORTL, 7, portl, pinl, ddrl),
+        A: crate::pac::PORTA = [0, 1, 2, 3, 4, 5, 6, 7],
+        B: crate::pac::PORTB = [0, 1, 2, 3, 4, 5, 6, 7],
+        C: crate::pac::PORTC = [0, 1, 2, 3, 4, 5, 6, 7],
+        D: crate::pac::PORTD = [0, 1, 2, 3, 4, 5, 6, 7],
+        E: crate::pac::PORTE = [0, 1, 2, 3, 4, 5, 6, 7],
+        F: crate::pac::PORTF = [0, 1, 2, 3, 4, 5, 6, 7],
+        G: crate::pac::PORTG = [0, 1, 2, 3, 4, 5],
+        H: crate::pac::PORTH = [0, 1, 2, 3, 4, 5, 6, 7],
+        J: crate::pac::PORTJ = [0, 1, 2, 3, 4, 5, 6, 7],
+        K: crate::pac::PORTK = [0, 1, 2, 3, 4, 5, 6, 7],
+        L: crate::pac::PORTL = [0, 1, 2, 3, 4, 5, 6, 7],
     }
 }
 
 #[cfg(any(feature = "atmega1284p", feature = "atmega32a"))]
 avr_hal_generic::impl_port_traditional! {
     enum Ports {
-        PORTA: (crate::pac::PORTA, porta, pina, ddra),
-        PORTB: (crate::pac::PORTB, portb, pinb, ddrb),
-        PORTC: (crate::pac::PORTC, portc, pinc, ddrc),
-        PORTD: (crate::pac::PORTD, portd, pind, ddrd),
-    }
-
-    pub struct Pins {
-        pa0: PA0 = (crate::pac::PORTA, PORTA, 0, porta, pina, ddra),
-        pa1: PA1 = (crate::pac::PORTA, PORTA, 1, porta, pina, ddra),
-        pa2: PA2 = (crate::pac::PORTA, PORTA, 2, porta, pina, ddra),
-        pa3: PA3 = (crate::pac::PORTA, PORTA, 3, porta, pina, ddra),
-        pa4: PA4 = (crate::pac::PORTA, PORTA, 4, porta, pina, ddra),
-        pa5: PA5 = (crate::pac::PORTA, PORTA, 5, porta, pina, ddra),
-        pa6: PA6 = (crate::pac::PORTA, PORTA, 6, porta, pina, ddra),
-        pa7: PA7 = (crate::pac::PORTA, PORTA, 7, porta, pina, ddra),
-        pb0: PB0 = (crate::pac::PORTB, PORTB, 0, portb, pinb, ddrb),
-        pb1: PB1 = (crate::pac::PORTB, PORTB, 1, portb, pinb, ddrb),
-        pb2: PB2 = (crate::pac::PORTB, PORTB, 2, portb, pinb, ddrb),
-        pb3: PB3 = (crate::pac::PORTB, PORTB, 3, portb, pinb, ddrb),
-        pb4: PB4 = (crate::pac::PORTB, PORTB, 4, portb, pinb, ddrb),
-        pb5: PB5 = (crate::pac::PORTB, PORTB, 5, portb, pinb, ddrb),
-        pb6: PB6 = (crate::pac::PORTB, PORTB, 6, portb, pinb, ddrb),
-        pb7: PB7 = (crate::pac::PORTB, PORTB, 7, portb, pinb, ddrb),
-        pc0: PC0 = (crate::pac::PORTC, PORTC, 0, portc, pinc, ddrc),
-        pc1: PC1 = (crate::pac::PORTC, PORTC, 1, portc, pinc, ddrc),
-        pc2: PC2 = (crate::pac::PORTC, PORTC, 2, portc, pinc, ddrc),
-        pc3: PC3 = (crate::pac::PORTC, PORTC, 3, portc, pinc, ddrc),
-        pc4: PC4 = (crate::pac::PORTC, PORTC, 4, portc, pinc, ddrc),
-        pc5: PC5 = (crate::pac::PORTC, PORTC, 5, portc, pinc, ddrc),
-        pc6: PC6 = (crate::pac::PORTC, PORTC, 6, portc, pinc, ddrc),
-        pc7: PC7 = (crate::pac::PORTC, PORTC, 7, portc, pinc, ddrc),
-        pd0: PD0 = (crate::pac::PORTD, PORTD, 0, portd, pind, ddrd),
-        pd1: PD1 = (crate::pac::PORTD, PORTD, 1, portd, pind, ddrd),
-        pd2: PD2 = (crate::pac::PORTD, PORTD, 2, portd, pind, ddrd),
-        pd3: PD3 = (crate::pac::PORTD, PORTD, 3, portd, pind, ddrd),
-        pd4: PD4 = (crate::pac::PORTD, PORTD, 4, portd, pind, ddrd),
-        pd5: PD5 = (crate::pac::PORTD, PORTD, 5, portd, pind, ddrd),
-        pd6: PD6 = (crate::pac::PORTD, PORTD, 6, portd, pind, ddrd),
-        pd7: PD7 = (crate::pac::PORTD, PORTD, 7, portd, pind, ddrd),
+        A: crate::pac::PORTA = [0, 1, 2, 3, 4, 5, 6, 7],
+        B: crate::pac::PORTB = [0, 1, 2, 3, 4, 5, 6, 7],
+        C: crate::pac::PORTC = [0, 1, 2, 3, 4, 5, 6, 7],
+        D: crate::pac::PORTD = [0, 1, 2, 3, 4, 5, 6, 7],
     }
 }
 
 #[cfg(any(feature = "atmega8"))]
 avr_hal_generic::impl_port_traditional! {
     enum Ports {
-        PORTB: (crate::pac::PORTB, portb, pinb, ddrb),
-        PORTC: (crate::pac::PORTC, portc, pinc, ddrc),
-        PORTD: (crate::pac::PORTD, portd, pind, ddrd),
-    }
-
-    pub struct Pins {
-        pb0: PB0 = (crate::pac::PORTB, PORTB, 0, portb, pinb, ddrb),
-        pb1: PB1 = (crate::pac::PORTB, PORTB, 1, portb, pinb, ddrb),
-        pb2: PB2 = (crate::pac::PORTB, PORTB, 2, portb, pinb, ddrb),
-        pb3: PB3 = (crate::pac::PORTB, PORTB, 3, portb, pinb, ddrb),
-        pb4: PB4 = (crate::pac::PORTB, PORTB, 4, portb, pinb, ddrb),
-        pb5: PB5 = (crate::pac::PORTB, PORTB, 5, portb, pinb, ddrb),
-        pb6: PB6 = (crate::pac::PORTB, PORTB, 6, portb, pinb, ddrb),
-        pb7: PB7 = (crate::pac::PORTB, PORTB, 7, portb, pinb, ddrb),
-        pc0: PC0 = (crate::pac::PORTC, PORTC, 0, portc, pinc, ddrc),
-        pc1: PC1 = (crate::pac::PORTC, PORTC, 1, portc, pinc, ddrc),
-        pc2: PC2 = (crate::pac::PORTC, PORTC, 2, portc, pinc, ddrc),
-        pc3: PC3 = (crate::pac::PORTC, PORTC, 3, portc, pinc, ddrc),
-        pc4: PC4 = (crate::pac::PORTC, PORTC, 4, portc, pinc, ddrc),
-        pc5: PC5 = (crate::pac::PORTC, PORTC, 5, portc, pinc, ddrc),
-        pc6: PC6 = (crate::pac::PORTC, PORTC, 6, portc, pinc, ddrc),
-        pd0: PD0 = (crate::pac::PORTD, PORTD, 0, portd, pind, ddrd),
-        pd1: PD1 = (crate::pac::PORTD, PORTD, 1, portd, pind, ddrd),
-        pd2: PD2 = (crate::pac::PORTD, PORTD, 2, portd, pind, ddrd),
-        pd3: PD3 = (crate::pac::PORTD, PORTD, 3, portd, pind, ddrd),
-        pd4: PD4 = (crate::pac::PORTD, PORTD, 4, portd, pind, ddrd),
-        pd5: PD5 = (crate::pac::PORTD, PORTD, 5, portd, pind, ddrd),
-        pd6: PD6 = (crate::pac::PORTD, PORTD, 6, portd, pind, ddrd),
-        pd7: PD7 = (crate::pac::PORTD, PORTD, 7, portd, pind, ddrd),
+        B: crate::pac::PORTB = [0, 1, 2, 3, 4, 5, 6, 7],
+        C: crate::pac::PORTC = [0, 1, 2, 3, 4, 5, 6],
+        D: crate::pac::PORTD = [0, 1, 2, 3, 4, 5, 6, 7],
     }
 }
diff --git a/mcu/attiny-hal/src/port.rs b/mcu/attiny-hal/src/port.rs
index 7aa4995145..6b4c8b0fee 100644
--- a/mcu/attiny-hal/src/port.rs
+++ b/mcu/attiny-hal/src/port.rs
@@ -1,138 +1,43 @@
-pub use avr_hal_generic::port::{mode, PinOps, PinMode};
+pub use avr_hal_generic::port::{mode, PinMode, PinOps};
 
 #[cfg(feature = "attiny2313")]
 avr_hal_generic::impl_port_traditional! {
     enum Ports {
-        PORTA: (crate::pac::PORTA, porta, pina, ddra),
-        PORTB: (crate::pac::PORTB, portb, pinb, ddrb),
-        PORTD: (crate::pac::PORTD, portd, pind, ddrd),
-    }
-
-    pub struct Pins {
-        pa0: PA0 = (crate::pac::PORTA, PORTA, 0, porta, pina, ddra),
-        pa1: PA1 = (crate::pac::PORTA, PORTA, 1, porta, pina, ddra),
-        pa2: PA2 = (crate::pac::PORTA, PORTA, 2, porta, pina, ddra),
-        pb0: PB0 = (crate::pac::PORTB, PORTB, 0, portb, pinb, ddrb),
-        pb1: PB1 = (crate::pac::PORTB, PORTB, 1, portb, pinb, ddrb),
-        pb2: PB2 = (crate::pac::PORTB, PORTB, 2, portb, pinb, ddrb),
-        pb3: PB3 = (crate::pac::PORTB, PORTB, 3, portb, pinb, ddrb),
-        pb4: PB4 = (crate::pac::PORTB, PORTB, 4, portb, pinb, ddrb),
-        pb5: PB5 = (crate::pac::PORTB, PORTB, 5, portb, pinb, ddrb),
-        pb6: PB6 = (crate::pac::PORTB, PORTB, 6, portb, pinb, ddrb),
-        pb7: PB7 = (crate::pac::PORTB, PORTB, 7, portb, pinb, ddrb),
-        pd0: PD0 = (crate::pac::PORTD, PORTD, 0, portd, pind, ddrd),
-        pd1: PD1 = (crate::pac::PORTD, PORTD, 1, portd, pind, ddrd),
-        pd2: PD2 = (crate::pac::PORTD, PORTD, 2, portd, pind, ddrd),
-        pd3: PD3 = (crate::pac::PORTD, PORTD, 3, portd, pind, ddrd),
-        pd4: PD4 = (crate::pac::PORTD, PORTD, 4, portd, pind, ddrd),
-        pd5: PD5 = (crate::pac::PORTD, PORTD, 5, portd, pind, ddrd),
-        pd6: PD6 = (crate::pac::PORTD, PORTD, 6, portd, pind, ddrd),
+        A: crate::pac::PORTA = [0, 1, 2],
+        B: crate::pac::PORTB = [0, 1, 2, 3, 4, 5, 6, 7],
+        D: crate::pac::PORTD = [0, 1, 2, 3, 4, 5, 6],
     }
 }
 
 #[cfg(feature = "attiny167")]
 avr_hal_generic::impl_port_traditional! {
     enum Ports {
-        PORTA: (crate::pac::PORTA, porta, pina, ddra),
-        PORTB: (crate::pac::PORTB, portb, pinb, ddrb),
-    }
-
-    pub struct Pins {
-        pa0: PA0 = (crate::pac::PORTA, PORTA, 0, porta, pina, ddra),
-        pa1: PA1 = (crate::pac::PORTA, PORTA, 1, porta, pina, ddra),
-        pa2: PA2 = (crate::pac::PORTA, PORTA, 2, porta, pina, ddra),
-        pa3: PA3 = (crate::pac::PORTA, PORTA, 3, porta, pina, ddra),
-        pa4: PA4 = (crate::pac::PORTA, PORTA, 4, porta, pina, ddra),
-        pa5: PA5 = (crate::pac::PORTA, PORTA, 5, porta, pina, ddra),
-        pa6: PA6 = (crate::pac::PORTA, PORTA, 6, porta, pina, ddra),
-        pa7: PA7 = (crate::pac::PORTA, PORTA, 7, porta, pina, ddra),
-        pb0: PB0 = (crate::pac::PORTB, PORTB, 0, portb, pinb, ddrb),
-        pb1: PB1 = (crate::pac::PORTB, PORTB, 1, portb, pinb, ddrb),
-        pb2: PB2 = (crate::pac::PORTB, PORTB, 2, portb, pinb, ddrb),
-        pb3: PB3 = (crate::pac::PORTB, PORTB, 3, portb, pinb, ddrb),
-        pb4: PB4 = (crate::pac::PORTB, PORTB, 4, portb, pinb, ddrb),
-        pb5: PB5 = (crate::pac::PORTB, PORTB, 5, portb, pinb, ddrb),
-        pb6: PB6 = (crate::pac::PORTB, PORTB, 6, portb, pinb, ddrb),
-        pb7: PB7 = (crate::pac::PORTB, PORTB, 7, portb, pinb, ddrb),
+        A: crate::pac::PORTA = [0, 1, 2, 3, 4, 5, 6, 7],
+        B: crate::pac::PORTB = [0, 1, 2, 3, 4, 5, 6, 7],
     }
 }
 
 #[cfg(feature = "attiny84")]
 avr_hal_generic::impl_port_traditional! {
     enum Ports {
-        PORTA: (crate::pac::PORTA, porta, pina, ddra),
-        PORTB: (crate::pac::PORTB, portb, pinb, ddrb),
-    }
-
-    pub struct Pins {
-        pa0: PA0 = (crate::pac::PORTA, PORTA, 0, porta, pina, ddra),
-        pa1: PA1 = (crate::pac::PORTA, PORTA, 1, porta, pina, ddra),
-        pa2: PA2 = (crate::pac::PORTA, PORTA, 2, porta, pina, ddra),
-        pa3: PA3 = (crate::pac::PORTA, PORTA, 3, porta, pina, ddra),
-        pa4: PA4 = (crate::pac::PORTA, PORTA, 4, porta, pina, ddra),
-        pa5: PA5 = (crate::pac::PORTA, PORTA, 5, porta, pina, ddra),
-        pa6: PA6 = (crate::pac::PORTA, PORTA, 6, porta, pina, ddra),
-        pa7: PA7 = (crate::pac::PORTA, PORTA, 7, porta, pina, ddra),
-        pb0: PB0 = (crate::pac::PORTB, PORTB, 0, portb, pinb, ddrb),
-        pb1: PB1 = (crate::pac::PORTB, PORTB, 1, portb, pinb, ddrb),
-        pb2: PB2 = (crate::pac::PORTB, PORTB, 2, portb, pinb, ddrb),
-        pb3: PB3 = (crate::pac::PORTB, PORTB, 3, portb, pinb, ddrb),
+        A: crate::pac::PORTA = [0, 1, 2, 3, 4, 5, 6, 7],
+        B: crate::pac::PORTB = [0, 1, 2, 3],
     }
 }
 
 #[cfg(feature = "attiny85")]
 avr_hal_generic::impl_port_traditional! {
     enum Ports {
-        PORTB: (crate::pac::PORTB, portb, pinb, ddrb),
-    }
-
-    pub struct Pins {
-        pb0: PB0 = (crate::pac::PORTB, PORTB, 0, portb, pinb, ddrb),
-        pb1: PB1 = (crate::pac::PORTB, PORTB, 1, portb, pinb, ddrb),
-        pb2: PB2 = (crate::pac::PORTB, PORTB, 2, portb, pinb, ddrb),
-        pb3: PB3 = (crate::pac::PORTB, PORTB, 3, portb, pinb, ddrb),
-        pb4: PB4 = (crate::pac::PORTB, PORTB, 4, portb, pinb, ddrb),
-        pb5: PB5 = (crate::pac::PORTB, PORTB, 5, portb, pinb, ddrb),
+        B: crate::pac::PORTB = [0, 1, 2, 3, 4, 5],
     }
 }
 
 #[cfg(feature = "attiny88")]
 avr_hal_generic::impl_port_traditional! {
     enum Ports {
-        PORTA: (crate::pac::PORTA, porta, pina, ddra),
-        PORTB: (crate::pac::PORTB, portb, pinb, ddrb),
-        PORTC: (crate::pac::PORTC, portc, pinc, ddrc),
-        PORTD: (crate::pac::PORTD, portd, pind, ddrd),
-    }
-
-    pub struct Pins {
-        pa0: PA0 = (crate::pac::PORTA, PORTA, 0, porta, pina, ddra),
-        pa1: PA1 = (crate::pac::PORTA, PORTA, 1, porta, pina, ddra),
-        pa2: PA2 = (crate::pac::PORTA, PORTA, 2, porta, pina, ddra),
-        pa3: PA3 = (crate::pac::PORTA, PORTA, 3, porta, pina, ddra),
-        pb0: PB0 = (crate::pac::PORTB, PORTB, 0, portb, pinb, ddrb),
-        pb1: PB1 = (crate::pac::PORTB, PORTB, 1, portb, pinb, ddrb),
-        pb2: PB2 = (crate::pac::PORTB, PORTB, 2, portb, pinb, ddrb),
-        pb3: PB3 = (crate::pac::PORTB, PORTB, 3, portb, pinb, ddrb),
-        pb4: PB4 = (crate::pac::PORTB, PORTB, 4, portb, pinb, ddrb),
-        pb5: PB5 = (crate::pac::PORTB, PORTB, 5, portb, pinb, ddrb),
-        pb6: PB6 = (crate::pac::PORTB, PORTB, 6, portb, pinb, ddrb),
-        pb7: PB7 = (crate::pac::PORTB, PORTB, 7, portb, pinb, ddrb),
-        pc0: PC0 = (crate::pac::PORTC, PORTC, 0, portc, pinc, ddrc),
-        pc1: PC1 = (crate::pac::PORTC, PORTC, 1, portc, pinc, ddrc),
-        pc2: PC2 = (crate::pac::PORTC, PORTC, 2, portc, pinc, ddrc),
-        pc3: PC3 = (crate::pac::PORTC, PORTC, 3, portc, pinc, ddrc),
-        pc4: PC4 = (crate::pac::PORTC, PORTC, 4, portc, pinc, ddrc),
-        pc5: PC5 = (crate::pac::PORTC, PORTC, 5, portc, pinc, ddrc),
-        pc6: PC6 = (crate::pac::PORTC, PORTC, 6, portc, pinc, ddrc),
-        pc7: PC7 = (crate::pac::PORTC, PORTC, 7, portc, pinc, ddrc),
-        pd0: PD0 = (crate::pac::PORTD, PORTD, 0, portd, pind, ddrd),
-        pd1: PD1 = (crate::pac::PORTD, PORTD, 1, portd, pind, ddrd),
-        pd2: PD2 = (crate::pac::PORTD, PORTD, 2, portd, pind, ddrd),
-        pd3: PD3 = (crate::pac::PORTD, PORTD, 3, portd, pind, ddrd),
-        pd4: PD4 = (crate::pac::PORTD, PORTD, 4, portd, pind, ddrd),
-        pd5: PD5 = (crate::pac::PORTD, PORTD, 5, portd, pind, ddrd),
-        pd6: PD6 = (crate::pac::PORTD, PORTD, 6, portd, pind, ddrd),
-        pd7: PD7 = (crate::pac::PORTD, PORTD, 7, portd, pind, ddrd),
+        A: crate::pac::PORTA = [0, 1, 2, 3],
+        B: crate::pac::PORTB = [0, 1, 2, 3, 4, 5, 6, 7],
+        C: crate::pac::PORTC = [0, 1, 2, 3, 4, 5, 6, 7],
+        D: crate::pac::PORTD = [0, 1, 2, 3, 4, 5, 6, 7],
     }
 }