From a73e67782ae94708e689eb3ad9e482e2bd36f3c6 Mon Sep 17 00:00:00 2001 From: Anzooooo Date: Thu, 5 Dec 2024 21:10:19 +0800 Subject: [PATCH] fix(redirect): fix the `blockCommit` condition --- src/main/scala/xiangshan/backend/rob/Rob.scala | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/main/scala/xiangshan/backend/rob/Rob.scala b/src/main/scala/xiangshan/backend/rob/Rob.scala index 8555f27a7b..92d834e008 100644 --- a/src/main/scala/xiangshan/backend/rob/Rob.scala +++ b/src/main/scala/xiangshan/backend/rob/Rob.scala @@ -725,7 +725,9 @@ class RobImp(override val wrapper: Rob)(implicit p: Parameters, params: BackendP val deqFlushBlockCounter = Reg(UInt(3.W)) val deqFlushBlock = deqFlushBlockCounter(0) val deqHasCommitted = io.commits.isCommit && io.commits.commitValid(0) - val deqHitRedirectReg = RegNext(io.redirect.valid && io.redirect.bits.robIdx === deqPtr) + // TODO *** WARNING *** + // Blocking commit. Don't change this before we fully understand the logic. + val deqHitRedirectReg = RegNext(io.redirect.valid && io.redirect.bits.robIdx === deqPtr) || RegNext(RegNext(io.redirect.valid && io.redirect.bits.robIdx === deqPtr)) val criticalErrorState = io.csr.criticalErrorState when(deqNeedFlush && deqHitRedirectReg){ deqFlushBlockCounter := "b111".U