From 99baa882f137814e95c372978d463b249b24c43c Mon Sep 17 00:00:00 2001 From: Anzo <126764519+Anzooooo@users.noreply.github.com> Date: Fri, 13 Dec 2024 10:32:33 +0800 Subject: [PATCH] fix(StoreQueue): fix the `vecExceptionFlag` setting condition (#4037) Only if `dataBuffer.io.enq.fire` is considered to have `deq` --- src/main/scala/xiangshan/mem/lsqueue/StoreQueue.scala | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/main/scala/xiangshan/mem/lsqueue/StoreQueue.scala b/src/main/scala/xiangshan/mem/lsqueue/StoreQueue.scala index e98b7c7836..f05c4b830a 100644 --- a/src/main/scala/xiangshan/mem/lsqueue/StoreQueue.scala +++ b/src/main/scala/xiangshan/mem/lsqueue/StoreQueue.scala @@ -1255,12 +1255,12 @@ class StoreQueue(implicit p: Parameters) extends XSModule // If the last flow with an exception is the LastFlow of this instruction, the flag is not set. // compare robidx to select the last flow require(EnsbufferWidth == 2, "The vector store exception handle process only support EnsbufferWidth == 2 yet.") - val robidxEQ = dataBuffer.io.enq(0).valid && dataBuffer.io.enq(1).valid && + val robidxEQ = dataBuffer.io.enq(0).fire && dataBuffer.io.enq(1).fire && uop(rdataPtrExt(0).value).robIdx === uop(rdataPtrExt(1).value).robIdx - val robidxNE = dataBuffer.io.enq(0).valid && dataBuffer.io.enq(1).valid && ( + val robidxNE = dataBuffer.io.enq(0).fire && dataBuffer.io.enq(1).fire && ( uop(rdataPtrExt(0).value).robIdx =/= uop(rdataPtrExt(1).value).robIdx ) - val onlyCommit0 = dataBuffer.io.enq(0).valid && !dataBuffer.io.enq(1).valid + val onlyCommit0 = dataBuffer.io.enq(0).fire && !dataBuffer.io.enq(1).fire val vecCommitLastFlow = // robidx equal => check if 1 is last flow