From 4aa305e9bf32bc7e999c69333b914c31e8f505b7 Mon Sep 17 00:00:00 2001
From: Ma-YX <71326427+Ma-YX@users.noreply.github.com>
Date: Thu, 5 Dec 2024 16:31:34 +0800
Subject: [PATCH] feat(ECC): add ECC for coupledL2 and bump coupledL2 & openLLC
 (#3808)

* add optional ECC for L2 Cache tag & data
* add Poison & (optional) DataCheck for CHI
---
 coupledL2                            | 2 +-
 openLLC                              | 2 +-
 src/main/scala/top/Configs.scala     | 5 +++++
 src/main/scala/xiangshan/L2Top.scala | 8 +++++++-
 4 files changed, 14 insertions(+), 3 deletions(-)

diff --git a/coupledL2 b/coupledL2
index c4ce81f4c9..f03c2f6126 160000
--- a/coupledL2
+++ b/coupledL2
@@ -1 +1 @@
-Subproject commit c4ce81f4c932ea9a238b3e6df0079a007c2ba1ba
+Subproject commit f03c2f6126cfd23d61a7591f172395eee7f612ce
diff --git a/openLLC b/openLLC
index 13bc4abb0f..8405928827 160000
--- a/openLLC
+++ b/openLLC
@@ -1 +1 @@
-Subproject commit 13bc4abb0f343f11d47cfc57eefe5d609a077a0e
+Subproject commit 84059288270622833c864e9d54dee448048e2fae
diff --git a/src/main/scala/top/Configs.scala b/src/main/scala/top/Configs.scala
index 1f911a9f0e..3f573291d4 100644
--- a/src/main/scala/top/Configs.scala
+++ b/src/main/scala/top/Configs.scala
@@ -299,6 +299,11 @@ class WithNKBL2
         )),
         reqField = Seq(utility.ReqSourceField()),
         echoField = Seq(huancun.DirtyField()),
+        tagECC = Some("secded"),
+        dataECC = Some("secded"),
+        enableTagECC = true,
+        enableDataECC = true,
+        dataCheck = Some("oddparity"),
         prefetch = Seq(BOPParameters()) ++
           (if (tp) Seq(TPParameters()) else Nil) ++
           (if (p.prefetcher.nonEmpty) Seq(PrefetchReceiverParams()) else Nil),
diff --git a/src/main/scala/xiangshan/L2Top.scala b/src/main/scala/xiangshan/L2Top.scala
index 6b037aaacf..a93e98e32e 100644
--- a/src/main/scala/xiangshan/L2Top.scala
+++ b/src/main/scala/xiangshan/L2Top.scala
@@ -177,7 +177,8 @@ class L2TopInlined()(implicit p: Parameters) extends LazyModule
 
     val resetDelayN = Module(new DelayN(UInt(PAddrBits.W), 5))
 
-    beu.module.io.errors <> io.beu_errors
+    beu.module.io.errors.icache := io.beu_errors.icache
+    beu.module.io.errors.dcache := io.beu_errors.dcache
     resetDelayN.io.in := io.reset_vector.fromTile
     io.reset_vector.toCore := resetDelayN.io.out
     io.hartId.toCore := io.hartId.fromTile
@@ -240,6 +241,9 @@ class L2TopInlined()(implicit p: Parameters) extends LazyModule
           io.chi.get <> l2.io_chi
         case l2cache: TL2TLCoupledL2 =>
       }
+
+      beu.module.io.errors.l2.ecc_error.valid := l2.io.error.valid
+      beu.module.io.errors.l2.ecc_error.bits := l2.io.error.address
     } else {
       io.l2_hint := 0.U.asTypeOf(io.l2_hint)
       io.debugTopDown <> DontCare
@@ -249,6 +253,8 @@ class L2TopInlined()(implicit p: Parameters) extends LazyModule
       io.l2_tlb_req.req_kill := DontCare
       io.l2_tlb_req.resp.ready := true.B
       io.perfEvents := DontCare
+
+      beu.module.io.errors.l2 := 0.U.asTypeOf(beu.module.io.errors.l2)
     }
   }