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新版本的Nutshell 按照readme中的教程好像生成不了fpga工程 #200

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Taylorsbear720 opened this issue Jun 12, 2024 · 2 comments · Fixed by #206

Taylorsbear720 commented Jun 12, 2024

我在用最新的nutshell生成fpga工程时会报错。
报错原因为，在执行make之后不会在/build下生成Topmain.v而是在build/rtl下生成TopMain.sv
执行make verilog也是生成TopMain.sv文件，这和之前版本生成的文件不一致，这也导致在进入fpga后生成工程时，会导致说找不到Topmain.v文件。

Author

Taylorsbear720 commented Jun 13, 2024

尝试修改了common.tcl 将路径修改为正确的地址加后缀，同时将没有runahead文件注释掉。这样可以生成成功，但是生成的工程没有nutshell.bd，会形成如下的（这里我已经修改过文件的名字）：

dzwduan commented Jul 12, 2024

改一下这里

NutShell/src/test/scala/TopMain.scala

Line 79 in 52aeba5

:+ CIRCTTargetAnnotation(CIRCTTarget.SystemVerilog)

读circt文档

zhangziqing mentioned this issue

NutShell master branch re-adaption for FPGA platforms #206

Merged

poemonsense linked a pull request

that will close this issue

NutShell master branch re-adaption for FPGA platforms #206

Merged

poemonsense closed this as completed in #206

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