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Improving Xilinx Zynq-7000 support #5605

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vesajaaskelainen opened this issue Oct 23, 2022 · 10 comments
Open

Improving Xilinx Zynq-7000 support #5605

vesajaaskelainen opened this issue Oct 23, 2022 · 10 comments

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@vesajaaskelainen
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vesajaaskelainen commented Oct 23, 2022

This is to track merging of improved Xilinx Zynq-7000 support.

Current set of changes:

  • u-boot SPL: boots the system as in secure mode
  • u-boot SPL: has different device tree from u-boot proper to account for secure vs non-secure changes
  • u-boot SPL: loads the (from u-boot FIT image) device tree for u-boot proper & for OP-TEE usage
  • u-boot SPL: loads the (from u-boot FIT image) OP-TEE OS
  • OP-TEE: Workaround non-maskable FIQ problem (ARMv7 SCTRL.NMFI workaround support #5520)
  • OP-TEE: Load drivers based on system device tree loaded by u-boot SPL (Add driver probing also for external device tree use #5604)
  • OP-TEE: initializes DDR and OCM address space re-mappings (previously in u-boot)
  • OP-TEE: configures PL port priorities
  • OP-TEE: changes DDR memory layout in order to enable DDR firewalls
  • OP-TEE: switches to secure monitor's platform handler
  • OP-TEE: SMC services for:
    • reading PSS IDCODE
    • reading PS revision
    • reading boot mode
    • reading secure state
  • OP-TEE: enabling access for PL peripherals
  • OP-TEE: enable support for TZ aware peripherals so that REE maps device as non-secure and TEE maps it as secure (core: dt: Make it possible to alter device mapping #5603)
    • Our internal IP core in FPGA needs this and it also provides HUK related data
  • OP-TEE: enable non-secure access for DDRC and TTC1
  • OP-TEE: make it possible to use hardware TRNG
  • OP-TEE: fix DMAC configuration
  • OP-TEE: clock driver for internal clocks
    • missing real re-configuration of clocks -- assumes that FPGA designer has configure ps7_init properly that was set up in u-boot SPL.
    • reads PS clock frequency from u-boot loaded device tree
  • OP-TEE: SCMI support for clock control
  • OP-TEE: Add PSCI control support
    • Need a bit help on figuring out best way to do CPU startup sequences (or adapt OP-TEE)
  • OP-TEE: disable Generic Timers extension support as CPU does not feature it
  • OP-TEE: SMC service for XADC support
  • OP-TEE: SMC service for querying CPU clock frequency (before SCMI can be used in kernel)
  • OP-TEE: SMC service for pinctrl support
  • OP-TEE: driver for Cadence WDT
  • OP-TEE: start using ARM's system watchdog driver for servicing System WDT
  • OP-TEE: HUK support
  • u-boot proper: changes TBD (working on cleaning it up)
  • Linux: device-tree: Add PL330 DMA controller's non-secure interface definitions
  • Linux: device-tree: Helper DTSI for enabling OP-TEE support
  • Linux: mach-zynq: Support for OP-TEE SMC services and adjustments needed for setting up the system (mostly kernel configs + device tree changes)
  • Linux: pinctrl: Add support for OP-TEE SMC pinctrl service
  • Linux: xadc: Add support for OP-TEE SMC XADC service

Now it seems to be feature complete so that:

  • Boots into the Linux - no panics or anything
  • TRNG comes from Xiphera TRNG
  • xtest is executed successfully
  • Our own test suites for verifying that our needed features work passes

Known missing features:

  • No possibility to re-configure CPU internal clocks
  • No support for SCMI peripheral resets (as no-one seems to be using those)
  • There is now SCMI pinctrl in integration phase that probably needs to be taken in use instead of custom SMC interface.

Currently this all works in our own hardware -- should be able to get most working with common Xilinx ZC702 devkit (expect FPGA bitstream related features as there is no common bitstream that could be shared between parties).

@github-actions
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This issue has been marked as a stale issue because it has been open (more than) 30 days with no activity. Remove the stale label or add a comment, otherwise this issue will automatically be closed in 5 days. Note, that you can always re-open a closed issue at any time.

@github-actions github-actions bot added the Stale label Nov 23, 2022
@vesajaaskelainen
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Keep-alive

@jforissier jforissier removed the Stale label Nov 23, 2022
@github-actions
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This issue has been marked as a stale issue because it has been open (more than) 30 days with no activity. Remove the stale label or add a comment, otherwise this issue will automatically be closed in 5 days. Note, that you can always re-open a closed issue at any time.

@github-actions github-actions bot added the Stale label Dec 24, 2022
@vesajaaskelainen
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Keep-alive

@jforissier jforissier removed the Stale label Dec 24, 2022
@github-actions
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This issue has been marked as a stale issue because it has been open (more than) 30 days with no activity. Remove the stale label or add a comment, otherwise this issue will automatically be closed in 5 days. Note, that you can always re-open a closed issue at any time.

@github-actions github-actions bot added the Stale label Jan 24, 2023
@vesajaaskelainen
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Keep-alive

@jforissier jforissier removed the Stale label Jan 24, 2023
@github-actions
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This issue has been marked as a stale issue because it has been open (more than) 30 days with no activity. Remove the stale label or add a comment, otherwise this issue will automatically be closed in 5 days. Note, that you can always re-open a closed issue at any time.

@github-actions github-actions bot added the Stale label Feb 24, 2023
@vesajaaskelainen
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Keep-alive.

@jforissier can you add enhancement or such flag for this?

@jforissier
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@vesajaaskelainen sure, done.

@rajeshrah22
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image

Hey guys, is the build system configured to automatically pull ZyncMPSoC Boot Firmware? [1] and [2] mention it is required.
I don't seem to automatically have it.

[1] https://optee.readthedocs.io/en/latest/building/devices/zynqmp.html
[2] https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18842316/Linux+Prebuilt+Images

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