From e7759312b1fc356b8992ed4b940464907ae88f0f Mon Sep 17 00:00:00 2001 From: nwdepatie Date: Wed, 13 Mar 2024 17:14:38 -0400 Subject: [PATCH] Autogenerating STM code for ADC DMA --- CM7/Core/Inc/stm32h7xx_it.h | 1 + CM7/Core/Src/main.c | 111 +++++++++++++++++++++++++++++-- CM7/Core/Src/stm32h7xx_hal_msp.c | 23 +++++++ CM7/Core/Src/stm32h7xx_it.c | 15 +++++ Makefile/CM4/Makefile | 2 +- Makefile/CM7/Makefile | 2 +- proteus.ioc | 83 ++++++++++++++++++++++- 7 files changed, 228 insertions(+), 9 deletions(-) diff --git a/CM7/Core/Inc/stm32h7xx_it.h b/CM7/Core/Inc/stm32h7xx_it.h index 03c091f..ed65d7b 100644 --- a/CM7/Core/Inc/stm32h7xx_it.h +++ b/CM7/Core/Inc/stm32h7xx_it.h @@ -54,6 +54,7 @@ void UsageFault_Handler(void); void DebugMon_Handler(void); void SysTick_Handler(void); void DMA1_Stream0_IRQHandler(void); +void DMA1_Stream2_IRQHandler(void); /* USER CODE BEGIN EFP */ /* USER CODE END EFP */ diff --git a/CM7/Core/Src/main.c b/CM7/Core/Src/main.c index 5753eb2..42de874 100644 --- a/CM7/Core/Src/main.c +++ b/CM7/Core/Src/main.c @@ -50,6 +50,7 @@ ADC_HandleTypeDef hadc1; ADC_HandleTypeDef hadc3; DMA_HandleTypeDef hdma_adc1; +DMA_HandleTypeDef hdma_adc3; CRC_HandleTypeDef hcrc; @@ -335,11 +336,11 @@ static void MX_ADC1_Init(void) hadc1.Instance = ADC1; hadc1.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1; hadc1.Init.Resolution = ADC_RESOLUTION_16B; - hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE; + hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; hadc1.Init.LowPowerAutoWait = DISABLE; hadc1.Init.ContinuousConvMode = DISABLE; - hadc1.Init.NbrOfConversion = 1; + hadc1.Init.NbrOfConversion = 6; hadc1.Init.DiscontinuousConvMode = DISABLE; hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; @@ -373,6 +374,51 @@ static void MX_ADC1_Init(void) { Error_Handler(); } + + /** Configure Regular Channel + */ + sConfig.Channel = ADC_CHANNEL_4; + sConfig.Rank = ADC_REGULAR_RANK_2; + if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + { + Error_Handler(); + } + + /** Configure Regular Channel + */ + sConfig.Channel = ADC_CHANNEL_5; + sConfig.Rank = ADC_REGULAR_RANK_3; + if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + { + Error_Handler(); + } + + /** Configure Regular Channel + */ + sConfig.Channel = ADC_CHANNEL_7; + sConfig.Rank = ADC_REGULAR_RANK_4; + if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + { + Error_Handler(); + } + + /** Configure Regular Channel + */ + sConfig.Channel = ADC_CHANNEL_8; + sConfig.Rank = ADC_REGULAR_RANK_5; + if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + { + Error_Handler(); + } + + /** Configure Regular Channel + */ + sConfig.Channel = ADC_CHANNEL_9; + sConfig.Rank = ADC_REGULAR_RANK_6; + if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + { + Error_Handler(); + } /* USER CODE BEGIN ADC1_Init 2 */ /* USER CODE END ADC1_Init 2 */ @@ -401,11 +447,11 @@ static void MX_ADC3_Init(void) */ hadc3.Instance = ADC3; hadc3.Init.Resolution = ADC_RESOLUTION_16B; - hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE; + hadc3.Init.ScanConvMode = ADC_SCAN_ENABLE; hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV; hadc3.Init.LowPowerAutoWait = DISABLE; hadc3.Init.ContinuousConvMode = DISABLE; - hadc3.Init.NbrOfConversion = 1; + hadc3.Init.NbrOfConversion = 7; hadc3.Init.DiscontinuousConvMode = DISABLE; hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START; hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; @@ -431,6 +477,60 @@ static void MX_ADC3_Init(void) { Error_Handler(); } + + /** Configure Regular Channel + */ + sConfig.Channel = ADC_CHANNEL_2; + sConfig.Rank = ADC_REGULAR_RANK_2; + if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) + { + Error_Handler(); + } + + /** Configure Regular Channel + */ + sConfig.Channel = ADC_CHANNEL_3; + sConfig.Rank = ADC_REGULAR_RANK_3; + if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) + { + Error_Handler(); + } + + /** Configure Regular Channel + */ + sConfig.Channel = ADC_CHANNEL_7; + sConfig.Rank = ADC_REGULAR_RANK_4; + if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) + { + Error_Handler(); + } + + /** Configure Regular Channel + */ + sConfig.Channel = ADC_CHANNEL_8; + sConfig.Rank = ADC_REGULAR_RANK_5; + if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) + { + Error_Handler(); + } + + /** Configure Regular Channel + */ + sConfig.Channel = ADC_CHANNEL_10; + sConfig.Rank = ADC_REGULAR_RANK_6; + if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) + { + Error_Handler(); + } + + /** Configure Regular Channel + */ + sConfig.Channel = ADC_CHANNEL_11; + sConfig.Rank = ADC_REGULAR_RANK_7; + if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) + { + Error_Handler(); + } /* USER CODE BEGIN ADC3_Init 2 */ /* USER CODE END ADC3_Init 2 */ @@ -980,6 +1080,9 @@ static void MX_DMA_Init(void) /* DMA1_Stream0_IRQn interrupt configuration */ HAL_NVIC_SetPriority(DMA1_Stream0_IRQn, 5, 0); HAL_NVIC_EnableIRQ(DMA1_Stream0_IRQn); + /* DMA1_Stream2_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(DMA1_Stream2_IRQn, 5, 0); + HAL_NVIC_EnableIRQ(DMA1_Stream2_IRQn); } diff --git a/CM7/Core/Src/stm32h7xx_hal_msp.c b/CM7/Core/Src/stm32h7xx_hal_msp.c index 63d7120..a3cad01 100644 --- a/CM7/Core/Src/stm32h7xx_hal_msp.c +++ b/CM7/Core/Src/stm32h7xx_hal_msp.c @@ -26,6 +26,8 @@ /* USER CODE END Includes */ extern DMA_HandleTypeDef hdma_adc1; +extern DMA_HandleTypeDef hdma_adc3; + /* Private typedef -----------------------------------------------------------*/ /* USER CODE BEGIN TD */ @@ -178,6 +180,25 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) HAL_SYSCFG_AnalogSwitchConfig(SYSCFG_SWITCH_PC3, SYSCFG_SWITCH_PC3_OPEN); + /* ADC3 DMA Init */ + /* ADC3 Init */ + hdma_adc3.Instance = DMA1_Stream2; + hdma_adc3.Init.Request = DMA_REQUEST_ADC3; + hdma_adc3.Init.Direction = DMA_PERIPH_TO_MEMORY; + hdma_adc3.Init.PeriphInc = DMA_PINC_DISABLE; + hdma_adc3.Init.MemInc = DMA_MINC_ENABLE; + hdma_adc3.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD; + hdma_adc3.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD; + hdma_adc3.Init.Mode = DMA_NORMAL; + hdma_adc3.Init.Priority = DMA_PRIORITY_HIGH; + hdma_adc3.Init.FIFOMode = DMA_FIFOMODE_DISABLE; + if (HAL_DMA_Init(&hdma_adc3) != HAL_OK) + { + Error_Handler(); + } + + __HAL_LINKDMA(hadc,DMA_Handle,hdma_adc3); + /* USER CODE BEGIN ADC3_MspInit 1 */ /* USER CODE END ADC3_MspInit 1 */ @@ -242,6 +263,8 @@ void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc) HAL_GPIO_DeInit(GPIOC, GPIO_PIN_0|GPIO_PIN_1); + /* ADC3 DMA DeInit */ + HAL_DMA_DeInit(hadc->DMA_Handle); /* USER CODE BEGIN ADC3_MspDeInit 1 */ /* USER CODE END ADC3_MspDeInit 1 */ diff --git a/CM7/Core/Src/stm32h7xx_it.c b/CM7/Core/Src/stm32h7xx_it.c index 273abf6..15636eb 100644 --- a/CM7/Core/Src/stm32h7xx_it.c +++ b/CM7/Core/Src/stm32h7xx_it.c @@ -58,6 +58,7 @@ /* External variables --------------------------------------------------------*/ extern DMA_HandleTypeDef hdma_adc1; +extern DMA_HandleTypeDef hdma_adc3; /* USER CODE BEGIN EV */ /* USER CODE END EV */ @@ -196,6 +197,20 @@ void DMA1_Stream0_IRQHandler(void) /* USER CODE END DMA1_Stream0_IRQn 1 */ } +/** + * @brief This function handles DMA1 stream2 global interrupt. + */ +void DMA1_Stream2_IRQHandler(void) +{ + /* USER CODE BEGIN DMA1_Stream2_IRQn 0 */ + + /* USER CODE END DMA1_Stream2_IRQn 0 */ + HAL_DMA_IRQHandler(&hdma_adc3); + /* USER CODE BEGIN DMA1_Stream2_IRQn 1 */ + + /* USER CODE END DMA1_Stream2_IRQn 1 */ +} + /* USER CODE BEGIN 1 */ /* USER CODE END 1 */ diff --git a/Makefile/CM4/Makefile b/Makefile/CM4/Makefile index 31f0d5f..979c53c 100644 --- a/Makefile/CM4/Makefile +++ b/Makefile/CM4/Makefile @@ -1,5 +1,5 @@ ########################################################################################################################## -# File automatically-generated by tool: [projectgenerator] version: [4.2.0-B44] date: [Fri Feb 23 17:55:52 EST 2024] +# File automatically-generated by tool: [projectgenerator] version: [4.2.0-B44] date: [Wed Mar 13 17:13:51 EDT 2024] ########################################################################################################################## # ------------------------------------------------ diff --git a/Makefile/CM7/Makefile b/Makefile/CM7/Makefile index c29ca83..531ceac 100644 --- a/Makefile/CM7/Makefile +++ b/Makefile/CM7/Makefile @@ -1,5 +1,5 @@ ########################################################################################################################## -# File automatically-generated by tool: [projectgenerator] version: [4.2.0-B44] date: [Fri Feb 23 17:55:53 EST 2024] +# File automatically-generated by tool: [projectgenerator] version: [4.2.0-B44] date: [Wed Mar 13 17:13:51 EDT 2024] ########################################################################################################################## # ------------------------------------------------ diff --git a/proteus.ioc b/proteus.ioc index f16fdd8..385ad5a 100644 --- a/proteus.ioc +++ b/proteus.ioc @@ -1,19 +1,76 @@ #MicroXplorer Configuration settings - do not modify ADC1.Channel-1\#ChannelRegularConversion=ADC_CHANNEL_3 -ADC1.IPParameters=Rank-1\#ChannelRegularConversion,Channel-1\#ChannelRegularConversion,SamplingTime-1\#ChannelRegularConversion,OffsetNumber-1\#ChannelRegularConversion,OffsetSignedSaturation-1\#ChannelRegularConversion,NbrOfConversionFlag,master +ADC1.Channel-2\#ChannelRegularConversion=ADC_CHANNEL_4 +ADC1.Channel-3\#ChannelRegularConversion=ADC_CHANNEL_5 +ADC1.Channel-4\#ChannelRegularConversion=ADC_CHANNEL_7 +ADC1.Channel-5\#ChannelRegularConversion=ADC_CHANNEL_8 +ADC1.Channel-6\#ChannelRegularConversion=ADC_CHANNEL_9 +ADC1.IPParameters=Rank-1\#ChannelRegularConversion,Channel-1\#ChannelRegularConversion,SamplingTime-1\#ChannelRegularConversion,OffsetNumber-1\#ChannelRegularConversion,OffsetSignedSaturation-1\#ChannelRegularConversion,NbrOfConversionFlag,master,Rank-2\#ChannelRegularConversion,Channel-2\#ChannelRegularConversion,SamplingTime-2\#ChannelRegularConversion,OffsetNumber-2\#ChannelRegularConversion,OffsetSignedSaturation-2\#ChannelRegularConversion,Rank-3\#ChannelRegularConversion,Channel-3\#ChannelRegularConversion,SamplingTime-3\#ChannelRegularConversion,OffsetNumber-3\#ChannelRegularConversion,OffsetSignedSaturation-3\#ChannelRegularConversion,NbrOfConversion,Rank-4\#ChannelRegularConversion,Channel-4\#ChannelRegularConversion,SamplingTime-4\#ChannelRegularConversion,OffsetNumber-4\#ChannelRegularConversion,OffsetSignedSaturation-4\#ChannelRegularConversion,Rank-5\#ChannelRegularConversion,Channel-5\#ChannelRegularConversion,SamplingTime-5\#ChannelRegularConversion,OffsetNumber-5\#ChannelRegularConversion,OffsetSignedSaturation-5\#ChannelRegularConversion,Rank-6\#ChannelRegularConversion,Channel-6\#ChannelRegularConversion,SamplingTime-6\#ChannelRegularConversion,OffsetNumber-6\#ChannelRegularConversion,OffsetSignedSaturation-6\#ChannelRegularConversion +ADC1.NbrOfConversion=6 ADC1.NbrOfConversionFlag=1 ADC1.OffsetNumber-1\#ChannelRegularConversion=ADC_OFFSET_NONE +ADC1.OffsetNumber-2\#ChannelRegularConversion=ADC_OFFSET_NONE +ADC1.OffsetNumber-3\#ChannelRegularConversion=ADC_OFFSET_NONE +ADC1.OffsetNumber-4\#ChannelRegularConversion=ADC_OFFSET_NONE +ADC1.OffsetNumber-5\#ChannelRegularConversion=ADC_OFFSET_NONE +ADC1.OffsetNumber-6\#ChannelRegularConversion=ADC_OFFSET_NONE ADC1.OffsetSignedSaturation-1\#ChannelRegularConversion=DISABLE +ADC1.OffsetSignedSaturation-2\#ChannelRegularConversion=DISABLE +ADC1.OffsetSignedSaturation-3\#ChannelRegularConversion=DISABLE +ADC1.OffsetSignedSaturation-4\#ChannelRegularConversion=DISABLE +ADC1.OffsetSignedSaturation-5\#ChannelRegularConversion=DISABLE +ADC1.OffsetSignedSaturation-6\#ChannelRegularConversion=DISABLE ADC1.Rank-1\#ChannelRegularConversion=1 +ADC1.Rank-2\#ChannelRegularConversion=2 +ADC1.Rank-3\#ChannelRegularConversion=3 +ADC1.Rank-4\#ChannelRegularConversion=4 +ADC1.Rank-5\#ChannelRegularConversion=5 +ADC1.Rank-6\#ChannelRegularConversion=6 ADC1.SamplingTime-1\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5 +ADC1.SamplingTime-2\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5 +ADC1.SamplingTime-3\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5 +ADC1.SamplingTime-4\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5 +ADC1.SamplingTime-5\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5 +ADC1.SamplingTime-6\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5 ADC1.master=1 ADC3.Channel-2\#ChannelRegularConversion=ADC_CHANNEL_1 -ADC3.IPParameters=Rank-2\#ChannelRegularConversion,Channel-2\#ChannelRegularConversion,SamplingTime-2\#ChannelRegularConversion,OffsetNumber-2\#ChannelRegularConversion,OffsetSignedSaturation-2\#ChannelRegularConversion,NbrOfConversionFlag +ADC3.Channel-3\#ChannelRegularConversion=ADC_CHANNEL_2 +ADC3.Channel-4\#ChannelRegularConversion=ADC_CHANNEL_3 +ADC3.Channel-5\#ChannelRegularConversion=ADC_CHANNEL_7 +ADC3.Channel-6\#ChannelRegularConversion=ADC_CHANNEL_8 +ADC3.Channel-7\#ChannelRegularConversion=ADC_CHANNEL_10 +ADC3.Channel-8\#ChannelRegularConversion=ADC_CHANNEL_11 +ADC3.IPParameters=Rank-2\#ChannelRegularConversion,Channel-2\#ChannelRegularConversion,SamplingTime-2\#ChannelRegularConversion,OffsetNumber-2\#ChannelRegularConversion,OffsetSignedSaturation-2\#ChannelRegularConversion,NbrOfConversionFlag,Rank-3\#ChannelRegularConversion,Channel-3\#ChannelRegularConversion,SamplingTime-3\#ChannelRegularConversion,OffsetNumber-3\#ChannelRegularConversion,OffsetSignedSaturation-3\#ChannelRegularConversion,Rank-4\#ChannelRegularConversion,Channel-4\#ChannelRegularConversion,SamplingTime-4\#ChannelRegularConversion,OffsetNumber-4\#ChannelRegularConversion,OffsetSignedSaturation-4\#ChannelRegularConversion,Rank-5\#ChannelRegularConversion,Channel-5\#ChannelRegularConversion,SamplingTime-5\#ChannelRegularConversion,OffsetNumber-5\#ChannelRegularConversion,OffsetSignedSaturation-5\#ChannelRegularConversion,Rank-6\#ChannelRegularConversion,Channel-6\#ChannelRegularConversion,SamplingTime-6\#ChannelRegularConversion,OffsetNumber-6\#ChannelRegularConversion,OffsetSignedSaturation-6\#ChannelRegularConversion,Rank-7\#ChannelRegularConversion,Channel-7\#ChannelRegularConversion,SamplingTime-7\#ChannelRegularConversion,OffsetNumber-7\#ChannelRegularConversion,OffsetSignedSaturation-7\#ChannelRegularConversion,NbrOfConversion,Rank-8\#ChannelRegularConversion,Channel-8\#ChannelRegularConversion,SamplingTime-8\#ChannelRegularConversion,OffsetNumber-8\#ChannelRegularConversion,OffsetSignedSaturation-8\#ChannelRegularConversion +ADC3.NbrOfConversion=7 ADC3.NbrOfConversionFlag=1 ADC3.OffsetNumber-2\#ChannelRegularConversion=ADC_OFFSET_NONE +ADC3.OffsetNumber-3\#ChannelRegularConversion=ADC_OFFSET_NONE +ADC3.OffsetNumber-4\#ChannelRegularConversion=ADC_OFFSET_NONE +ADC3.OffsetNumber-5\#ChannelRegularConversion=ADC_OFFSET_NONE +ADC3.OffsetNumber-6\#ChannelRegularConversion=ADC_OFFSET_NONE +ADC3.OffsetNumber-7\#ChannelRegularConversion=ADC_OFFSET_NONE +ADC3.OffsetNumber-8\#ChannelRegularConversion=ADC_OFFSET_NONE ADC3.OffsetSignedSaturation-2\#ChannelRegularConversion=DISABLE +ADC3.OffsetSignedSaturation-3\#ChannelRegularConversion=DISABLE +ADC3.OffsetSignedSaturation-4\#ChannelRegularConversion=DISABLE +ADC3.OffsetSignedSaturation-5\#ChannelRegularConversion=DISABLE +ADC3.OffsetSignedSaturation-6\#ChannelRegularConversion=DISABLE +ADC3.OffsetSignedSaturation-7\#ChannelRegularConversion=DISABLE +ADC3.OffsetSignedSaturation-8\#ChannelRegularConversion=DISABLE ADC3.Rank-2\#ChannelRegularConversion=1 +ADC3.Rank-3\#ChannelRegularConversion=2 +ADC3.Rank-4\#ChannelRegularConversion=3 +ADC3.Rank-5\#ChannelRegularConversion=4 +ADC3.Rank-6\#ChannelRegularConversion=5 +ADC3.Rank-7\#ChannelRegularConversion=6 +ADC3.Rank-8\#ChannelRegularConversion=7 ADC3.SamplingTime-2\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5 +ADC3.SamplingTime-3\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5 +ADC3.SamplingTime-4\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5 +ADC3.SamplingTime-5\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5 +ADC3.SamplingTime-6\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5 +ADC3.SamplingTime-7\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5 +ADC3.SamplingTime-8\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5 CAD.formats= CAD.pinconfig= CAD.provider= @@ -37,8 +94,27 @@ Dma.ADC1.0.SyncEnable=DISABLE Dma.ADC1.0.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT Dma.ADC1.0.SyncRequestNumber=1 Dma.ADC1.0.SyncSignalID=NONE +Dma.ADC3.1.Direction=DMA_PERIPH_TO_MEMORY +Dma.ADC3.1.EventEnable=DISABLE +Dma.ADC3.1.FIFOMode=DMA_FIFOMODE_DISABLE +Dma.ADC3.1.Instance=DMA1_Stream2 +Dma.ADC3.1.MemDataAlignment=DMA_MDATAALIGN_HALFWORD +Dma.ADC3.1.MemInc=DMA_MINC_ENABLE +Dma.ADC3.1.Mode=DMA_NORMAL +Dma.ADC3.1.PeriphDataAlignment=DMA_PDATAALIGN_HALFWORD +Dma.ADC3.1.PeriphInc=DMA_PINC_DISABLE +Dma.ADC3.1.Polarity=HAL_DMAMUX_REQ_GEN_RISING +Dma.ADC3.1.Priority=DMA_PRIORITY_HIGH +Dma.ADC3.1.RequestNumber=1 +Dma.ADC3.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber +Dma.ADC3.1.SignalID=NONE +Dma.ADC3.1.SyncEnable=DISABLE +Dma.ADC3.1.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT +Dma.ADC3.1.SyncRequestNumber=1 +Dma.ADC3.1.SyncSignalID=NONE Dma.Request0=ADC1 -Dma.RequestsNb=1 +Dma.Request1=ADC3 +Dma.RequestsNb=2 FDCAN1.CalculateBaudRateNominal=625000 FDCAN1.CalculateTimeBitNominal=1600 FDCAN1.CalculateTimeQuantumNominal=320.0 @@ -175,6 +251,7 @@ MxCube.Version=6.10.0 MxDb.Version=DB.6.0.100 NVIC1.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false NVIC1.DMA1_Stream0_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true +NVIC1.DMA1_Stream2_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true NVIC1.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false NVIC1.ForceEnableDMAVector=true NVIC1.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false