Adding Frequency Latency Estimation via CPU Clock Modulation (Duty Cycle Modulation) #1
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The model exited complaining about confidency overlap. Need to figure out why. Cannot estimate latency of clock modulation.
Use uint64_t is somehow important for MSRWRITE to 0x19a.
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Sorry, missing one commit. Will close and open another request. |
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Sorry, reopen it. Did not miss today's commit. Recent commit is in the bottom. |
| echo "############################" >> ${OUTPUT_DIR}/${OUTPUT_FILE}"_"${startFreq}"-"${testFreq}${OUTPUT_EXT} | ||
| done | ||
| fi | ||
| setDutyCycle-16.exe |
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I don't see from where this is coming.
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Thanks for reviewing the code! Thanks! Wei |
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Using "#ifndef DCM" macro to leave the original DVFS latency estimation code unchanged. Minimal/Zero impact to original FTaLaT code functionality.
Enhance the tool with DCM estimation which enables DCM and DVFS comparison.
Thanks!
Wei Wang