From 5171f1335fc574cbc19591cc630dc6cf0d3eea3e Mon Sep 17 00:00:00 2001 From: Dion Dokter Date: Sun, 10 Nov 2024 16:18:40 +0100 Subject: [PATCH] Update to device-driver 1.0 (rc0) --- Cargo.lock | 254 ++++++++++++++++++++++++++++++++++++------ Cargo.toml | 4 +- src/lib.rs | 315 ++++++++++++++++++++++++++++++++++------------------- 3 files changed, 424 insertions(+), 149 deletions(-) diff --git a/Cargo.lock b/Cargo.lock index 73dc1e5..08df594 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -2,6 +2,30 @@ # It is not intended for manual editing. version = 4 +[[package]] +name = "ahash" +version = "0.8.11" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "e89da841a80418a9b391ebaea17f5c112ffaaa96f621d2c285b5174da76b9011" +dependencies = [ + "cfg-if", + "once_cell", + "version_check", + "zerocopy", +] + +[[package]] +name = "anyhow" +version = "1.0.93" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "4c95c10ba0b00a02636238b814946408b1322d5ac4760326e6fb8ec956d85775" + +[[package]] +name = "arraydeque" +version = "0.5.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "7d902e3d592a523def97af8f317b08ce16b7ab854c1985a0c671e6f15cebc236" + [[package]] name = "bitvec" version = "1.0.1" @@ -14,6 +38,12 @@ dependencies = [ "wyz", ] +[[package]] +name = "cfg-if" +version = "1.0.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "baf1de4339761588bc0619e3cbc0120ee582ebb74b53b4efbf79117bd2da40fd" + [[package]] name = "convert_case" version = "0.6.0" @@ -23,53 +53,77 @@ dependencies = [ "unicode-segmentation", ] +[[package]] +name = "dd-manifest-tree" +version = "1.0.0-rc.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "825e44dfb8c67d03e0946bbed227496e4d04240b713537cb5d7965dc194c097f" +dependencies = [ + "serde_json", + "toml", + "yaml-rust2", +] + [[package]] name = "device-driver" -version = "0.7.0" +version = "1.0.0-rc.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "14d19add61e3771b821cffda4a8c833a31ce2bbab8f85268a06c326f46a90f40" +checksum = "541ada0dba6a835333249dee4471f723620769a61c390c522d9b7f074516b702" dependencies = [ "bitvec", "device-driver-macros", "embedded-io", "embedded-io-async", - "funty", - "num_enum", ] [[package]] name = "device-driver-generation" -version = "0.7.0" +version = "1.0.0-rc.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "a5c4b133511a7d6c62bbd6a446dc7f5b799bbc4d89af634bfde75095d5aa62b7" +checksum = "2164194b1162f98acebf1cba9b91beccccb93cc689c491bffe427c674887ed1f" dependencies = [ + "anyhow", + "bitvec", "convert_case", - "indexmap", - "prettyplease", + "dd-manifest-tree", + "itertools", "proc-macro2", "quote", - "serde", "syn", ] [[package]] name = "device-driver-macros" -version = "0.7.0" +version = "1.0.0-rc.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "7f3172b490fa376f3a7964df70fa97a7df21eec753f493e3052f2f7cfd9f9edb" +checksum = "425f199f922281a7003be3ad7db369927f3492408f462cc6d8dfb393d76ce948" dependencies = [ "device-driver-generation", "proc-macro2", - "quote", "syn", ] +[[package]] +name = "either" +version = "1.13.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "60b1af1c220855b6ceac025d3f6ecdd2b7c4894bfe9cd9bda4fbb4bc7c0d4cf0" + [[package]] name = "embedded-hal" version = "1.0.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "361a90feb7004eca4019fb28352a9465666b24f840f5c3cddf0ff13920590b89" +[[package]] +name = "embedded-hal-async" +version = "1.0.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "0c4c685bbef7fe13c3c6dd4da26841ed3980ef33e841cddfa15ce8a8fb3f1884" +dependencies = [ + "embedded-hal", +] + [[package]] name = "embedded-io" version = "0.6.1" @@ -85,6 +139,15 @@ dependencies = [ "embedded-io", ] +[[package]] +name = "encoding_rs" +version = "0.8.35" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "75030f3c4f45dafd7586dd6780965a8c7e8e285a5ecb86713e63a79c5b2766f3" +dependencies = [ + "cfg-if", +] + [[package]] name = "equivalent" version = "1.0.1" @@ -97,12 +160,30 @@ version = "2.0.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "e6d5a32815ae3f33302d95fdcb2ce17862f8c65363dcfd29360480ba1001fc9c" +[[package]] +name = "hashbrown" +version = "0.14.5" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "e5274423e17b7c9fc20b6e7e208532f9b19825d82dfd615708b70edd83df41f1" +dependencies = [ + "ahash", +] + [[package]] name = "hashbrown" version = "0.15.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "1e087f84d4f86bf4b218b927129862374b72199ae7d8657835f1e89000eea4fb" +[[package]] +name = "hashlink" +version = "0.9.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "6ba4ff7128dee98c7dc9794b6a411377e1404dba1c97deb8d1a55297bd25d8af" +dependencies = [ + "hashbrown 0.14.5", +] + [[package]] name = "indexmap" version = "2.6.0" @@ -110,39 +191,35 @@ source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "707907fe3c25f5424cce2cb7e1cbcafee6bdbe735ca90ef77c29e84591e5b9da" dependencies = [ "equivalent", - "hashbrown", - "serde", + "hashbrown 0.15.0", ] [[package]] -name = "num_enum" -version = "0.7.3" +name = "itertools" +version = "0.13.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "4e613fc340b2220f734a8595782c551f1250e969d87d3be1ae0579e8d4065179" +checksum = "413ee7dfc52ee1a4949ceeb7dbc8a33f2d6c088194d9f922fb8318faf1f01186" dependencies = [ - "num_enum_derive", + "either", ] [[package]] -name = "num_enum_derive" -version = "0.7.3" +name = "itoa" +version = "1.0.11" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "af1844ef2428cc3e1cb900be36181049ef3d3193c63e43026cfe202983b27a56" -dependencies = [ - "proc-macro2", - "quote", - "syn", -] +checksum = "49f1f14873335454500d59611f1cf4a4b0f786f9ac11f4312a78e4cf2566695b" [[package]] -name = "prettyplease" -version = "0.2.22" +name = "memchr" +version = "2.7.4" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "479cf940fbbb3426c32c5d5176f62ad57549a0bb84773423ba8be9d089f5faba" -dependencies = [ - "proc-macro2", - "syn", -] +checksum = "78ca9ab1a0babb1e7d5695e3530886289c18cf2f87ec19a575a0abdce112e3a3" + +[[package]] +name = "once_cell" +version = "1.20.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "1261fe7e33c73b354eab43b1273a57c8f967d0391e80353e51f764ac02cf6775" [[package]] name = "proc-macro2" @@ -168,6 +245,12 @@ version = "0.7.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "dc33ff2d4973d518d823d61aa239014831e521c75da58e3df4840d3f47749d09" +[[package]] +name = "ryu" +version = "1.0.18" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "f3cb5ba0dc43242ce17de99c180e96db90b235b8a9fdc9543c96d2209116bd9f" + [[package]] name = "serde" version = "1.0.210" @@ -188,6 +271,28 @@ dependencies = [ "syn", ] +[[package]] +name = "serde_json" +version = "1.0.132" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "d726bfaff4b320266d395898905d0eba0345aae23b54aee3a737e260fd46db03" +dependencies = [ + "indexmap", + "itoa", + "memchr", + "ryu", + "serde", +] + +[[package]] +name = "serde_spanned" +version = "0.6.8" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "87607cb1398ed59d48732e575a4c28a7a8ebf2454b964fe3f224f2afc07909e1" +dependencies = [ + "serde", +] + [[package]] name = "syn" version = "2.0.79" @@ -205,6 +310,41 @@ version = "1.0.1" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "55937e1799185b12863d447f42597ed69d9928686b8d88a1df17376a097d8369" +[[package]] +name = "toml" +version = "0.8.19" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "a1ed1f98e3fdc28d6d910e6737ae6ab1a93bf1985935a1193e68f93eeb68d24e" +dependencies = [ + "indexmap", + "serde", + "serde_spanned", + "toml_datetime", + "toml_edit", +] + +[[package]] +name = "toml_datetime" +version = "0.6.8" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "0dd7358ecb8fc2f8d014bf86f6f638ce72ba252a2c3a2572f2a795f1d23efb41" +dependencies = [ + "serde", +] + +[[package]] +name = "toml_edit" +version = "0.22.22" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "4ae48d6208a266e853d946088ed816055e556cc6028c5e8e2b84d9fa5dd7c7f5" +dependencies = [ + "indexmap", + "serde", + "serde_spanned", + "toml_datetime", + "winnow", +] + [[package]] name = "unicode-ident" version = "1.0.13" @@ -223,7 +363,22 @@ version = "0.1.3" dependencies = [ "device-driver", "embedded-hal", - "num_enum", + "embedded-hal-async", +] + +[[package]] +name = "version_check" +version = "0.9.5" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "0b928f33d975fc6ad9f86c8f283853ad26bdd5b10b7f1542aa2fa15e2289105a" + +[[package]] +name = "winnow" +version = "0.6.20" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "36c1fec1a2bb5866f07c25f68c26e565c4c200aebb96d7e55710c19d3e8ac49b" +dependencies = [ + "memchr", ] [[package]] @@ -234,3 +389,34 @@ checksum = "05f360fc0b24296329c78fda852a1e9ae82de9cf7b27dae4b7f62f118f77b9ed" dependencies = [ "tap", ] + +[[package]] +name = "yaml-rust2" +version = "0.9.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "2a1a1c0bc9823338a3bdf8c61f994f23ac004c6fa32c08cd152984499b445e8d" +dependencies = [ + "arraydeque", + "encoding_rs", + "hashlink", +] + +[[package]] +name = "zerocopy" +version = "0.7.35" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "1b9b4fd18abc82b8136838da5d50bae7bdea537c574d8dc1a34ed098d6c166f0" +dependencies = [ + "zerocopy-derive", +] + +[[package]] +name = "zerocopy-derive" +version = "0.7.35" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "fa4f8080344d4671fb4e831a13ad1e68092748387dfc4f55e356242fae12ce3e" +dependencies = [ + "proc-macro2", + "quote", + "syn", +] diff --git a/Cargo.toml b/Cargo.toml index 2a2f33f..97b9f67 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -12,6 +12,6 @@ repository = "https://github.com/LeFrenchPOC/vcnl36825t-rs" edition = "2021" [dependencies] -device-driver = "0.7.0" +device-driver = "1.0.0-rc.0" embedded-hal = "1.0.0" -num_enum = { version = "0.7.3", default_features = false } +embedded-hal-async = "1.0.0" diff --git a/src/lib.rs b/src/lib.rs index 7eaa91a..b61fcdf 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -1,8 +1,9 @@ #![no_std] -use device_driver::{implement_device, AddressableDevice, RegisterDevice}; -use embedded_hal::i2c::{Error, ErrorKind, I2c}; -use registers::PsSt; +use device_driver::{AsyncRegisterInterface, RegisterInterface}; +use embedded_hal::i2c::{Error, ErrorKind, I2c, Operation}; +use embedded_hal_async::i2c::I2c as I2cAsync; +use registers::{PsSt, Registers}; const VCNL36825T_ADDRESS: u8 = 0x60; const VCNL36825T_ID: u16 = 0x0026; @@ -12,44 +13,76 @@ pub enum PSError { InvalidID, I2CError(ErrorKind), } -pub struct VCNL36825T { +pub struct Interface { i2c: I2C, } -impl AddressableDevice for VCNL36825T { +impl RegisterInterface for Interface { + type Error = PSError; type AddressType = u8; + + fn write_register( + &mut self, + address: Self::AddressType, + _size_bits: u32, + data: &[u8], + ) -> Result<(), Self::Error> { + self.i2c + .transaction( + VCNL36825T_ADDRESS, + &mut [Operation::Write(&[address]), Operation::Write(data)], + ) + .map_err(|e| PSError::I2CError(e.kind())) + } + + fn read_register( + &mut self, + address: Self::AddressType, + _size_bits: u32, + data: &mut [u8], + ) -> Result<(), Self::Error> { + self.i2c + .write_read(VCNL36825T_ADDRESS, &[address], data) + .map_err(|e| PSError::I2CError(e.kind())) + } } -impl RegisterDevice for VCNL36825T { +impl AsyncRegisterInterface for Interface { type Error = PSError; + type AddressType = u8; - fn write_register( + async fn write_register( &mut self, address: Self::AddressType, - data: &device_driver::bitvec::prelude::BitArray<[u8; SIZE_BYTES]>, + _size_bits: u32, + data: &[u8], ) -> Result<(), Self::Error> { - let mut buffer = [0u8; 3]; - buffer[0] = address; - buffer[1..].copy_from_slice(&data.as_raw_slice()[..SIZE_BYTES]); self.i2c - .write(VCNL36825T_ADDRESS, &buffer) + .transaction( + VCNL36825T_ADDRESS, + &mut [Operation::Write(&[address]), Operation::Write(data)], + ) + .await .map_err(|e| PSError::I2CError(e.kind())) } - fn read_register( + async fn read_register( &mut self, address: Self::AddressType, - data: &mut device_driver::bitvec::prelude::BitArray<[u8; SIZE_BYTES]>, + _size_bits: u32, + data: &mut [u8], ) -> Result<(), Self::Error> { - let mut buffer = [0u8; 2]; self.i2c - .write_read(VCNL36825T_ADDRESS, &[address], &mut buffer) - .map_err(|e| PSError::I2CError(e.kind()))?; - data.as_raw_mut_slice()[..SIZE_BYTES].copy_from_slice(&buffer[..SIZE_BYTES]); - Ok(()) + .write_read(VCNL36825T_ADDRESS, &[address], data) + .await + .map_err(|e| PSError::I2CError(e.kind())) } } +pub struct VCNL36825T { + ll: registers::Registers>, +} + impl Default for VCNL36825T { fn default() -> Self { Self::new(I2C::default()).unwrap() @@ -58,83 +91,141 @@ impl Default for VCNL36825T { impl VCNL36825T { pub fn new(i2c: I2C) -> Result { - let mut vcnl36825t = VCNL36825T { i2c }; - if vcnl36825t.id().read().unwrap().device_id() != VCNL36825T_ID { + let mut vcnl36825t = VCNL36825T { + ll: registers::Registers::new(Interface { i2c }), + }; + if vcnl36825t.ll.id().read().unwrap().device_id() != VCNL36825T_ID { return Err(PSError::InvalidID); } - vcnl36825t.ps_thdl().clear()?; + vcnl36825t.ll.ps_thdl().write(|_| {})?; Ok(vcnl36825t) } + pub fn power_on(&mut self) -> Result<(), PSError> { + self.ll.ps_conf_1().write(|reg| { + reg.set_res_1(1); + reg.set_res_2(1) + })?; + self.ll.ps_conf_2().write(|reg| reg.set_ps_st(PsSt::Stop))?; + self.ll.ps_conf_1().write(|reg| { + reg.set_ps_on(true); + reg.set_ps_cal(true); + reg.set_res_1(1); + reg.set_res_2(1) + })?; + self.ll.ps_conf_2().write(|reg| reg.set_ps_st(PsSt::Start)) + } +} + +impl VCNL36825T { + pub async fn new_async(i2c: I2C) -> Result { + let mut vcnl36825t = VCNL36825T { + ll: registers::Registers::new(Interface { i2c }), + }; + if vcnl36825t.ll.id().read_async().await.unwrap().device_id() != VCNL36825T_ID { + return Err(PSError::InvalidID); + } + vcnl36825t.ll.ps_thdl().write_async(|_| {}).await?; + Ok(vcnl36825t) + } + + pub async fn power_on_async(&mut self) -> Result<(), PSError> { + self.ll + .ps_conf_1() + .write_async(|reg| { + reg.set_res_1(1); + reg.set_res_2(1) + }) + .await?; + self.ll + .ps_conf_2() + .write_async(|reg| reg.set_ps_st(PsSt::Stop)) + .await?; + self.ll + .ps_conf_1() + .write_async(|reg| { + reg.set_ps_on(true); + reg.set_ps_cal(true); + reg.set_res_1(1); + reg.set_res_2(1) + }) + .await?; + self.ll + .ps_conf_2() + .write_async(|reg| reg.set_ps_st(PsSt::Start)) + .await + } +} + +impl VCNL36825T { pub fn destroy(self) -> I2C { - self.i2c + self.ll.interface.i2c } - pub fn power_on(&mut self) -> Result<(), PSError> { - self.ps_conf_1().write(|w| w.res_1(1).res_2(1))?; - self.ps_conf_2().write(|w| w.ps_st(PsSt::Stop))?; - self.ps_conf_1() - .write(|w| w.ps_on(true).ps_cal(true).res_1(1).res_2(1))?; - self.ps_conf_2().write(|w| w.ps_st(PsSt::Start)) + pub fn registers(&mut self) -> &mut Registers> { + &mut self.ll } } pub mod registers { - use super::*; - implement_device!( - impl VCNL36825T { + device_driver::create_device!( + device_name: Registers, + dsl: { + config { + type DefaultByteOrder = LE; + type RegisterAddressType = u8; + } register PS_CONF1 { - type RWType = ReadWrite; - type ByteOrder = LE; - const ADDRESS: u8 = 0x00; - const SIZE_BITS: usize = 16; - const RESET_VALUE: [u8] = [0x01, 0x00]; - res1: u8 = 0..1, + type Access = ReadWrite; + const ADDRESS = 0x00; + const SIZE_BITS = 16; + const RESET_VALUE = [0x01, 0x00]; + + res1: uint = 0..1, ps_on: bool = 1, ps_cal: bool = 7, - res2: u8 = 9..10, + res2: uint = 9..10, }, register PS_CONF2 { - type RWType = ReadWrite; - type ByteOrder = LE; - const ADDRESS: u8 = 0x03; - const SIZE_BITS: usize = 16; - const RESET_VALUE: [u8] = [0x01, 0x00]; + type Access = ReadWrite; + const ADDRESS = 0x03; + const SIZE_BITS = 16; + const RESET_VALUE = [0x01, 0x00]; - ps_st: u8 as enum PsSt { + ps_st: uint as enum PsSt { Start = 0, Stop = 1, } = 0..1, ps_smart_pers: bool = 1, - ps_int: u8 as enum PsInt { + ps_int: uint as try enum PsInt { IntOff = 0, IntOn = 1, } = 2..4, - ps_pers: u8 as enum PsPers { + ps_pers: uint as enum PsPers { Pers1 = 0, Pers2 = 1, Pers3 = 2, Pers4 = 3, } = 4..6, - ps_period: u8 as enum PsPeriod { + ps_period: uint as enum PsPeriod { Period10ms = 0, Period20ms = 1, Period40ms = 2, Period80ms = 3, } = 6..8, ps_hg: bool = 10, - ps_itb: u8 as enum PsItb { + ps_itb: uint as enum PsItb { Itb25us = 0, Itb50us = 1, } = 11..12, - ps_mps: u8 as enum PsMps { + ps_mps: uint as enum PsMps { Mps1 = 0, Mps2 = 1, Mps4 = 2, Mps8 = 3, } = 12..14, - ps_it: u8 as enum PsIt { + ps_it: uint as enum PsIt { It1T = 0, It2T = 1, It4T = 2, @@ -142,27 +233,26 @@ pub mod registers { } = 14..16, }, register PS_CONF3 { - type RWType = ReadWrite; - type ByteOrder = LE; - const ADDRESS: u8 = 0x04; - const SIZE_BITS: usize = 16; - const RESET_VALUE: [u8] = [0x00, 0x00]; + type Access = ReadWrite; + const ADDRESS = 0x04; + const SIZE_BITS = 16; + const RESET_VALUE = [0x00, 0x00]; ps_sp_int: bool = 2, - res3: u8 = 3..4, - ps_forcenum: u8 as enum PsForcenum { + res3: uint = 3..4, + ps_forcenum: uint as enum PsForcenum { OneCycle = 0, TwoCycle = 1, } = 4..5, - ps_trig: u8 as enum PsTrig { + ps_trig: uint as enum PsTrig { NoPSActive = 0, OneTimeCycle = 1, } = 5..6, - ps_af: u8 as enum PsAF { + ps_af: uint as enum PsAF { AutoMode = 0, ForceMode = 1, } = 6..7, - i_vcsel: u8 as enum IVcsel { + i_vcsel: uint as try enum IVcsel { I10mA = 2, I12mA = 3, I14mA = 4, @@ -170,63 +260,62 @@ pub mod registers { I18mA = 6, I20mA = 7, } = 8..12, - ps_hd: u8 as enum PsHd { + ps_hd: uint as enum PsHd { HD12Bits = 0, HD16Bits = 1, } = 12..13, - ps_sc: u8 as enum PsSc { + ps_sc: uint as try enum PsSc { SunlightCancellationDisable = 0, SunlightCancellationEnable = 7, } = 13..16, }, register PS_THDL { - type RWType = ReadWrite; - type ByteOrder = LE; - const ADDRESS: u8 = 0x05; - const SIZE_BITS: usize = 16; - const RESET_VALUE: [u8] = [0x00, 0x00]; - value: u16 = 0..12, + type Access = ReadWrite; + const ADDRESS = 0x05; + const SIZE_BITS = 16; + const RESET_VALUE = [0x00, 0x00]; + + value: uint = 0..12, }, register PS_THDH { - type RWType = ReadWrite; - type ByteOrder = LE; - const ADDRESS: u8 = 0x06; - const SIZE_BITS: usize = 16; - const RESET_VALUE: [u8] = [0x00, 0x00]; - value: u16 = 0..12, + type Access = ReadWrite; + const ADDRESS = 0x06; + const SIZE_BITS = 16; + const RESET_VALUE = [0x00, 0x00]; + + value: uint = 0..12, }, register PS_CANC { - type RWType = ReadWrite; - type ByteOrder = LE; - const ADDRESS: u8 = 0x07; - const SIZE_BITS: usize = 16; - const RESET_VALUE: [u8] = [0x00, 0x00]; - value: u16 = 0..12, + type Access = ReadWrite; + const ADDRESS = 0x07; + const SIZE_BITS = 16; + const RESET_VALUE = [0x00, 0x00]; + + value: uint = 0..12, }, register PS_CONF4 { - type RWType = ReadWrite; - type ByteOrder = LE; - const ADDRESS: u8 = 0x08; - const SIZE_BITS: usize = 16; - const RESET_VALUE: [u8] = [0x00, 0x00]; + type Access = ReadWrite; + const ADDRESS = 0x08; + const SIZE_BITS = 16; + const RESET_VALUE = [0x00, 0x00]; ps_ac_int: bool = 0, ps_ac_trig: bool = 2, ps_ac: bool = 3, - ps_ac_num: u8 as enum PsAcNum { + ps_ac_num: uint as enum PsAcNum { Num1 = 0, Num2 = 1, Num4 = 2, Num8 = 3, } = 4..6, - ps_ac_period: u8 as enum PsAcPeriod { + ps_ac_period: uint as enum PsAcPeriod { Period3ms = 0, Period6ms = 1, Period12ms = 2, Period24ms = 3, } = 6..8, ps_lpen: bool = 8, - ps_lpper: u8 as enum PsLpPeriod { + ps_lpper: uint as enum PsLpPeriod { Period40ms = 0, Period80ms = 1, Period160ms = 2, @@ -234,39 +323,39 @@ pub mod registers { } = 9..11, }, register PS_DATA { - type RWType = ReadOnly; - type ByteOrder = LE; - const ADDRESS: u8 = 0xF8; - const SIZE_BITS: usize = 16; - const RESET_VALUE: [u8] = [0x00, 0x00]; - value: u16 = 0..12, + type Access = ReadOnly; + const ADDRESS = 0xF8; + const SIZE_BITS = 16; + const RESET_VALUE = [0x00, 0x00]; + + value: uint = 0..12, }, register INT_FLAG { - type RWType = ReadOnly; - type ByteOrder = LE; - const ADDRESS: u8 = 0xF9; - const SIZE_BITS: usize = 16; - const RESET_VALUE: [u8] = [0x00, 0x00]; + type Access = ReadOnly; + const ADDRESS = 0xF9; + const SIZE_BITS = 16; + const RESET_VALUE = [0x00, 0x00]; + ps_if_away: bool = 8, ps_if_close: bool = 9, ps_spflag: bool = 12, - ps_acflag: bool = 12, + ps_acflag: bool = 13, }, register ID { - type RWType = ReadOnly; - type ByteOrder = LE; - const ADDRESS: u8 = 0xFA; - const SIZE_BITS: usize = 16; - const RESET_VALUE: [u8] = [0x26, 0x00]; - device_id: u16 = 0..12, + type Access = ReadOnly; + const ADDRESS = 0xFA; + const SIZE_BITS = 16; + const RESET_VALUE = [0x26, 0x00]; + + device_id: uint = 0..12, }, register PS_AC_DATA { - type RWType = ReadOnly; - type ByteOrder = LE; - const ADDRESS: u8 = 0xFB; - const SIZE_BITS: usize = 16; - const RESET_VALUE: [u8] = [0x00, 0x00]; - value: u16 = 0..12, + type Access = ReadOnly; + const ADDRESS = 0xFB; + const SIZE_BITS = 16; + const RESET_VALUE = [0x00, 0x00]; + + value: uint = 0..12, ac_sun: bool = 14, ac_busy: bool = 15, },