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0001-Decompiler.patch
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0001-Decompiler.patch
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From d626579084cba5aca98f502a1629dbd7c8c6327f Mon Sep 17 00:00:00 2001
From: Johannes Feichtner <[email protected]>
Date: Thu, 14 Jun 2018 11:58:39 +0200
Subject: [PATCH 1/1] Decompiler
---
.gitignore | 3 +
CMakeLists.txt | 4 +
include/llvm/DC/DCInstrSema.h | 2 +
include/llvm/DC/DCRegisterSema.h | 4 +-
include/llvm/MC/MCObjectDisassembler.h | 9 +
include/llvm/Object/ObjectiveCFile.h | 117 +
lib/DC/DCInstrSema.cpp | 438 +-
lib/DC/DCRegisterSema.cpp | 20 +-
lib/DC/DCTranslator.cpp | 167 +-
lib/MC/MCAnalysis/MCObjectDisassembler.cpp | 223 +-
lib/Object/CMakeLists.txt | 1 +
lib/Object/ObjectiveCFile.cpp | 297 +
lib/Target/AArch64/AArch64.td | 8 +
lib/Target/AArch64/AArch64ISelLowering.h | 4 +-
lib/Target/AArch64/AArch64InstrFormats.td | 88 +-
lib/Target/AArch64/AArch64InstrInfo.td | 8 +-
lib/Target/AArch64/AArch64RegisterInfo.td | 42 +-
lib/Target/AArch64/AArch64Sema.td | 542 +
lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp | 22 +-
lib/Target/AArch64/CMakeLists.txt | 2 +
lib/Target/AArch64/DC/AArch64DCInfo.cpp | 38 +
lib/Target/AArch64/DC/AArch64InstrSema.cpp | 2993 ++++++
lib/Target/AArch64/DC/AArch64InstrSema.h | 33 +
lib/Target/AArch64/DC/AArch64InstrSemaDebug.cpp | 10391 +++++++++++++++++++
lib/Target/AArch64/DC/AArch64RegisterSema.cpp | 441 +
lib/Target/AArch64/DC/AArch64RegisterSema.h | 34 +
lib/Target/AArch64/DC/CMakeLists.txt | 10 +
lib/Target/AArch64/DC/LD_ST_cases.h | 1361 +++
lib/Target/AArch64/DC/LLVMBuild.txt | 23 +
.../AArch64/Disassembler/AArch64Disassembler.cpp | 14 +-
lib/Target/AArch64/LLVMBuild.txt | 2 +-
.../AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp | 77 +
.../AArch64/MCTargetDesc/AArch64MCTargetDesc.h | 1 +
lib/Target/X86/DC/X86InstrSema.h | 1 +
tools/llvm-dec/CMakeLists.txt | 2 +
tools/llvm-dec/FunctionNamePass.cpp | 470 +
tools/llvm-dec/FunctionNamePass.h | 34 +
tools/llvm-dec/TailCallPass.cpp | 145 +
tools/llvm-dec/TailCallPass.h | 25 +
tools/llvm-dec/llvm-dec.cpp | 59 +-
utils/TableGen/SemanticsEmitter.cpp | 17 +
41 files changed, 18037 insertions(+), 135 deletions(-)
create mode 100644 include/llvm/Object/ObjectiveCFile.h
create mode 100644 lib/Object/ObjectiveCFile.cpp
create mode 100644 lib/Target/AArch64/AArch64Sema.td
create mode 100644 lib/Target/AArch64/DC/AArch64DCInfo.cpp
create mode 100644 lib/Target/AArch64/DC/AArch64InstrSema.cpp
create mode 100644 lib/Target/AArch64/DC/AArch64InstrSema.h
create mode 100644 lib/Target/AArch64/DC/AArch64InstrSemaDebug.cpp
create mode 100644 lib/Target/AArch64/DC/AArch64RegisterSema.cpp
create mode 100644 lib/Target/AArch64/DC/AArch64RegisterSema.h
create mode 100644 lib/Target/AArch64/DC/CMakeLists.txt
create mode 100644 lib/Target/AArch64/DC/LD_ST_cases.h
create mode 100644 lib/Target/AArch64/DC/LLVMBuild.txt
create mode 100644 tools/llvm-dec/FunctionNamePass.cpp
create mode 100644 tools/llvm-dec/FunctionNamePass.h
create mode 100644 tools/llvm-dec/TailCallPass.cpp
create mode 100644 tools/llvm-dec/TailCallPass.h
diff --git a/.gitignore b/.gitignore
index e3d191d..0ed8c14 100644
--- a/.gitignore
+++ b/.gitignore
@@ -64,3 +64,6 @@ docs/_build
#==============================================================================#
bindings/go/llvm/llvm_config.go
bindings/go/llvm/workdir
+
+build*/*
+.idea/*
diff --git a/CMakeLists.txt b/CMakeLists.txt
index cd72aa1..7e77d3e 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -20,6 +20,10 @@ if (POLICY CMP0051)
cmake_policy(SET CMP0051 OLD)
endif()
+if(POLICY CMP0046)
+ cmake_policy(SET CMP0046 OLD)
+endif()
+
if(CMAKE_VERSION VERSION_LESS 3.1.20141117)
set(cmake_3_2_USES_TERMINAL)
else()
diff --git a/include/llvm/DC/DCInstrSema.h b/include/llvm/DC/DCInstrSema.h
index 5b82288..e5cdc1b 100644
--- a/include/llvm/DC/DCInstrSema.h
+++ b/include/llvm/DC/DCInstrSema.h
@@ -149,6 +149,8 @@ protected:
unsigned MIOperandNo) = 0;
virtual void translateImplicit(unsigned RegNo) = 0;
+ virtual void translateTargetIntrinsic(unsigned IntrinsicID) = 0;
+
// Try to do a custom translation of a full instruction.
// Called before translating an instruction.
// Return true if the translation shouldn't proceed.
diff --git a/include/llvm/DC/DCRegisterSema.h b/include/llvm/DC/DCRegisterSema.h
index d5be290..14199f0 100644
--- a/include/llvm/DC/DCRegisterSema.h
+++ b/include/llvm/DC/DCRegisterSema.h
@@ -154,8 +154,8 @@ public:
Value *getRegNoCallback(unsigned RegNo);
- Value *getReg(unsigned RegNo);
- void setReg(unsigned RegNo, Value *Val);
+ virtual Value *getReg(unsigned RegNo);
+ virtual void setReg(unsigned RegNo, Value *Val);
Type *getRegType(unsigned RegNo);
diff --git a/include/llvm/MC/MCObjectDisassembler.h b/include/llvm/MC/MCObjectDisassembler.h
index c7d4b51..380a221 100644
--- a/include/llvm/MC/MCObjectDisassembler.h
+++ b/include/llvm/MC/MCObjectDisassembler.h
@@ -20,6 +20,7 @@
#include "llvm/Support/DataTypes.h"
#include "llvm/MC/MCInst.h"
#include <vector>
+#include "llvm/Object/ObjectiveCFile.h"
namespace llvm {
@@ -72,6 +73,8 @@ public:
MOS = ObjectSymbolizer;
}
+ AddressSetTy findFunctionStarts();
+
protected:
const object::ObjectFile &Obj;
const MCDisassembler &Dis;
@@ -109,6 +112,12 @@ private:
void disassembleFunctionAt(MCModule *Module, MCFunction *MCFN,
uint64_t BeginAddr, AddressSetTy &CallTargets,
AddressSetTy &TailCallTargets);
+ bool checkBranch(MCInst &Inst, uint64_t Target);
+
+
+ AddressSetTy FunctionStarts;
+ bool Stripped;
+ std::unique_ptr<ObjectiveCFile> ObjCFile;
};
}
diff --git a/include/llvm/Object/ObjectiveCFile.h b/include/llvm/Object/ObjectiveCFile.h
new file mode 100644
index 0000000..37fae1a
--- /dev/null
+++ b/include/llvm/Object/ObjectiveCFile.h
@@ -0,0 +1,117 @@
+#ifndef LLVM_OBJECTIVECFILE_H
+#define LLVM_OBJECTIVECFILE_H
+
+#include "llvm/Object/MachO.h"
+
+#include <map>
+#include <string>
+
+namespace llvm {
+
+ class ObjectiveCFile {
+ public:
+ ObjectiveCFile(object::MachOObjectFile *MachO) : MachO(MachO) {
+ resolveMethods();
+ };
+
+ struct ObjcClass_t {
+ StringRef ClassName;
+ };
+ typedef struct ObjcClass_t ObjcClass_t;
+
+ struct ObjcMethod_t {
+ ObjcClass_t Class;
+ StringRef MethodName;
+ bool isClassMethod;
+ uint64_t IMP;
+ };
+ typedef struct ObjcMethod_t ObjcMethod_t;
+
+ std::map<uint64_t, std::string> getFunctionNames() {
+ return FunctionNames;
+ };
+ std::string getFunctionName(uint64_t Address) {
+ return FunctionNames[Address];
+ }
+ private:
+ struct ObjcDataStruct_t {
+ uint64_t ISA;
+ uint64_t Super;
+ uint64_t Cache;
+ uint64_t VTable;
+ uint64_t Data;
+ };
+ typedef struct ObjcDataStruct_t ObjcDataStruct_t;
+
+ struct ObjcClassInfoStruct_t {
+ uint32_t Flags;
+ uint32_t InstanceStart;
+ uint32_t InstanceSize;
+ uint32_t Reserved;
+ uint64_t IVarLayout;
+ uint64_t Name;
+ uint64_t BaseMethods;
+ uint64_t BaseProtocols;
+ uint64_t IVars;
+ uint64_t WeakIVarLayout;
+ uint64_t BaseProperties;
+ };
+ typedef struct ObjcClassInfoStruct_t ObjcClassInfoStruct_t;
+
+ typedef struct {
+ uint64_t Name;
+ uint64_t Class;
+ uint64_t InstaceMethods;
+ uint64_t ClassMethods;
+ } ObjcCatInfoStruct_t;
+
+ struct ObjcMethodListHeader_t {
+ uint32_t EntrySize;
+ uint32_t Count;
+ };
+ typedef struct ObjcMethodListHeader_t ObjcMethodListHeader_t;
+
+ struct ObjcMethodListEntry_t {
+ uint64_t Name;
+ uint64_t Types;
+ uint64_t Implementation;
+ };
+
+
+ object::MachOObjectFile *MachO;
+
+ uint64_t ObjcClasslistAddress = 0;
+ ArrayRef<uint8_t> ObjcClasslistData;
+
+ uint64_t ObjcDataAddress = 0;
+ ArrayRef<uint8_t> ObjcDataData;
+
+ uint64_t ObjcConstAddress = 0;
+ ArrayRef<uint8_t> ObjcConstData;
+
+ uint64_t ObjcMethodnamesAddress = 0;
+ ArrayRef<uint8_t> ObjcMethodnamesData;
+
+ uint64_t ObjcClassnamesAddress = 0;
+ ArrayRef<uint8_t> ObjcClassnamesData;
+
+ uint64_t ObjcCatlistAddress = 0;
+ ArrayRef<uint8_t> ObjcCatlistData;
+
+ std::map<uint64_t, std::string> FunctionNames;
+
+ void resolveMethods();
+
+ void resolveMethods(ObjcClassInfoStruct_t *ClassInfo, bool ClassMethods);
+ void resolveMethods(ObjcCatInfoStruct_t *CatInfo, bool ClassMethods, uint64_t CatInfoAddress, ObjcClassInfoStruct_t *ClassInfo);
+
+ StringRef getClassName(ArrayRef<uint8_t> &ObjcClassnames, uint64_t ObjcClassNamesAddress, uint64_t Address);
+ StringRef getMethodName(ArrayRef<uint8_t> &ObjcMethodnames, uint64_t ObjcMethodnamesAddress, uint64_t Address);
+
+ StringRef getClassName(uint64_t Pointer);
+ MachO::segment_command_64 getSegment(uint64_t SegmentNo);
+ };
+
+}
+
+#endif //LLVM_OBJECTIVECFILE_H
diff --git a/lib/DC/DCInstrSema.cpp b/lib/DC/DCInstrSema.cpp
index 8beb6be..cf1040d 100644
--- a/lib/DC/DCInstrSema.cpp
+++ b/lib/DC/DCInstrSema.cpp
@@ -28,6 +28,7 @@
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/MCAnalysis/MCFunction.h"
#include "llvm/Support/raw_ostream.h"
+#include "llvm/IR/Intrinsics.h"
using namespace llvm;
#define DEBUG_TYPE "dc-sema"
@@ -260,8 +261,9 @@ void DCInstrSema::SwitchToBasicBlock(uint64_t BeginAddr) {
// FIXME: we need to keep the unreachable+trap when the basic block is 0-inst.
// The PC at the start of the basic block is known, just set it.
- unsigned PC = DRS.MRI.getProgramCounter();
- setReg(PC, ConstantInt::get(DRS.getRegType(PC), BeginAddr));
+ //FIXME: AArch64 can't access the PC directly
+// unsigned PC = DRS.MRI.getProgramCounter();
+// setReg(PC, ConstantInt::get(DRS.getRegType(PC), BeginAddr));
}
uint64_t DCInstrSema::getBasicBlockStartAddress() const {
@@ -288,6 +290,7 @@ BasicBlock *DCInstrSema::getOrCreateBasicBlock(uint64_t Addr) {
BBBuilder
.CreateCall(Intrinsic::getDeclaration(TheModule, Intrinsic::trap));
BBBuilder.CreateUnreachable();
+
}
return BB;
}
@@ -353,8 +356,13 @@ void DCInstrSema::translateBinOp(Instruction::BinaryOps Opc) {
}
void DCInstrSema::translateCastOp(Instruction::CastOps Opc) {
- Type *ResType = ResEVT.getTypeForEVT(*Ctx);
- Value *Val = getNextOperand();
+ Type *ResType = nullptr;
+ Value *Val = getNextOperand();
+ if (ResEVT.getSimpleVT() == MVT::Untyped) {
+ ResType = Val->getType();
+ } else {
+ ResType = ResEVT.getTypeForEVT(*Ctx);
+ }
registerResult(Builder->CreateCast(Opc, Val, ResType));
}
@@ -365,6 +373,10 @@ DCInstrSema::translateInst(const MCDecodedInst &DecodedInst,
CurrentTInst = &TranslatedInst;
DRS.SwitchToInst(DecodedInst);
+ if (CurrentInst->Address == 0x100C65430) {
+ assert(true);
+ }
+
if (EnableInstAddrSave) {
ConstantInt *CurIVal =
Builder->getInt64(reinterpret_cast<uint64_t>(CurrentInst->Address));
@@ -381,10 +393,11 @@ DCInstrSema::translateInst(const MCDecodedInst &DecodedInst,
{
// Increment the PC before anything.
- Value *OldPC = getReg(DRS.MRI.getProgramCounter());
- setReg(DRS.MRI.getProgramCounter(),
- Builder->CreateAdd(
- OldPC, ConstantInt::get(OldPC->getType(), CurrentInst->Size)));
+ //FIXME: AArch64 can't access the PC
+// Value *OldPC = getReg(DRS.MRI.getProgramCounter());
+// setReg(DRS.MRI.getProgramCounter(),
+// Builder->CreateAdd(
+// OldPC, ConstantInt::get(OldPC->getType(), CurrentInst->Size)));
}
while ((Opcode = Next()) != DCINS::END_OF_INSTRUCTION)
@@ -488,8 +501,13 @@ void DCInstrSema::translateOpcode(unsigned Opcode) {
break;
}
case ISD::LOAD: {
- Type *ResType = ResEVT.getTypeForEVT(*Ctx);
Value *Ptr = getNextOperand();
+ Type *ResType = nullptr;
+ if (ResEVT.getSimpleVT() == MVT::Untyped) {
+ ResType = Ptr->getType();
+ } else {
+ ResType = ResEVT.getTypeForEVT(*Ctx);
+ }
if (!Ptr->getType()->isPointerTy())
Ptr = Builder->CreateIntToPtr(Ptr, ResType->getPointerTo());
assert(Ptr->getType()->getPointerElementType() == ResType &&
@@ -512,6 +530,7 @@ void DCInstrSema::translateOpcode(unsigned Opcode) {
case ISD::BRIND: {
Value *Op1 = getNextOperand();
setReg(DRS.MRI.getProgramCounter(), Op1);
+ //FIXME: this should be only a branch!?
insertCall(Op1);
Builder->CreateBr(ExitBB);
break;
@@ -519,7 +538,8 @@ void DCInstrSema::translateOpcode(unsigned Opcode) {
case ISD::BR: {
Value *Op1 = getNextOperand();
uint64_t Target = cast<ConstantInt>(Op1)->getValue().getZExtValue();
- setReg(DRS.MRI.getProgramCounter(), Op1);
+ //FIXME: can't access program counter
+ //setReg(DRS.MRI.getProgramCounter(), Op1);
Builder->CreateBr(getOrCreateBasicBlock(Target));
break;
}
@@ -539,8 +559,12 @@ void DCInstrSema::translateOpcode(unsigned Opcode) {
Res,
IntegerType::get(*Ctx, Res->getType()->getPrimitiveSizeInBits()));
if (Res->getType()->getPrimitiveSizeInBits() <
- RegType->getPrimitiveSizeInBits())
- Res = DRS.insertBitsInValue(getReg(RegNo), Res);
+ RegType->getPrimitiveSizeInBits()) {
+ //FIXME: in AArch64 we do not insert bits???
+ Res = Builder->CreateZExt(Res, RegType);
+// Res = DRS.insertBitsInValue(getReg(RegNo), Res);
+ }
+
assert(Res->getType() == RegType);
setReg(RegNo, Res);
CurrentTInst->addRegOpDef(MIOperandNo, Res);
@@ -555,13 +579,17 @@ void DCInstrSema::translateOpcode(unsigned Opcode) {
}
case DCINS::GET_RC: {
unsigned MIOperandNo = Next();
- Type *ResType = ResEVT.getTypeForEVT(*Ctx);
+ Type *ResType = NULL;
+ if (ResEVT.getEVTString() != "Untyped") {
+ ResType = ResEVT.getTypeForEVT(*Ctx);
+ }
+
Value *Reg = getReg(getRegOp(MIOperandNo));
- if (ResType->getPrimitiveSizeInBits() <
+ if (ResType && ResType->getPrimitiveSizeInBits() <
Reg->getType()->getPrimitiveSizeInBits())
Reg = Builder->CreateTrunc(
Reg, IntegerType::get(*Ctx, ResType->getPrimitiveSizeInBits()));
- if (!ResType->isIntegerTy())
+ if (ResType && !ResType->isIntegerTy())
Reg = Builder->CreateBitCast(Reg, ResType);
registerResult(Reg);
CurrentTInst->addRegOpUse(MIOperandNo, Reg);
@@ -626,7 +654,385 @@ void DCInstrSema::translateOpcode(unsigned Opcode) {
registerResult(Builder->CreateCall(IntDecl, Op));
break;
}
- default:
+ case ISD::CTLZ: {
+ auto count = [this](Value *v) {
+ uint64_t Width = v->getType()->getIntegerBitWidth();
+ Value *Zero = Builder->getInt(APInt(Width, 0));
+ Value *Max = Builder->getInt(APInt(Width, 0));
+ for (uint64_t i = 0; i < Width; ++i) {
+ Value *IsZero = Builder->CreateICmpEQ(v, Zero);
+ Value *NoMax = Builder->CreateICmpEQ(Max, Zero);
+ IsZero = Builder->CreateAnd(IsZero, NoMax);
+ Max = Builder->CreateSelect(IsZero, Builder->getInt(APInt(Width, Width - i)), Max);
+ v = Builder->CreateLShr(v, 1);
+ }
+ return Max;
+ };
+
+
+ if (ResEVT.isVector()) {
+ Value *vec = getNextOperand();
+ Value *result = Builder->getInt(APInt(ResEVT.getSizeInBits(), 0));
+ result = Builder->CreateBitCast(result, ResEVT.getTypeForEVT(*Ctx));
+ for (unsigned i = 0; i < ResEVT.getVectorNumElements(); ++i) {
+ Value *elem = Builder->CreateExtractElement(vec, i);
+ result = Builder->CreateInsertElement(result, count(elem), i);
+ }
+ registerResult(result);
+ } else {
+ Type *ResType = ResEVT.getTypeForEVT(*Ctx);
+ Value *Op = getNextOperand();
+ registerResult(count(Op));
+ }
+
+ break;
+ }
+ case ISD::FABS: {
+ Value *Reg = getNextOperand();
+ Value *Zero = ConstantFP::get(Reg->getType(), 0.0);
+ Value *One_neg = ConstantFP::get(Reg->getType(), -1.0);
+ Value *IsPos = Builder->CreateFCmpOGE(Reg, Zero);
+ Value *Neg = Builder->CreateFMul(Reg, One_neg);
+ Value *Result = Builder->CreateSelect(IsPos, Reg, Neg);
+ registerResult(Result);
+ break;
+ }
+ case ISD::FNEG: {
+ Value *Neg = Builder->CreateFNeg(getNextOperand());
+ registerResult(Neg);
+ break;
+ }
+ case ISD::FNEARBYINT:
+ case ISD::FTRUNC:
+ case ISD::FROUND:
+ case ISD::FRINT: {
+ Value *Src = getNextOperand();
+ std::vector<Value*> args;
+ args.push_back(Src);
+ std::vector<Type*> types;
+ types.push_back(Src->getType());
+ Value *Result = Builder->CreateCall(Intrinsic::getDeclaration(TheModule, Intrinsic::round, types), args);
+ registerResult(Result);
+ break;
+ }
+ case ISD::FFLOOR: {
+ Value *Src = getNextOperand();
+ std::vector<Value*> args;
+ args.push_back(Src);
+ std::vector<Type*> types;
+ types.push_back(Src->getType());
+ Value *Result = Builder->CreateCall(Intrinsic::getDeclaration(TheModule, Intrinsic::floor, types), args);
+ registerResult(Result);
+ break;
+ }
+ case ISD::FCEIL: {
+ Value *Src = getNextOperand();
+ std::vector<Value*> args;
+ args.push_back(Src);
+ std::vector<Type*> types;
+ types.push_back(Src->getType());
+ Value *Result = Builder->CreateCall(Intrinsic::getDeclaration(TheModule, Intrinsic::ceil, types), args);
+ registerResult(Result);
+ break;
+ }
+ case ISD::ConstantFP: {
+ registerResult(ConstantFP::get(ResEVT.getTypeForEVT(*Ctx), 0.0));
+ break;
+ }
+ case ISD::MULHU: {
+ Type *ExtType = IntegerType::get(*Ctx, 2 * ResEVT.getTypeForEVT(*Ctx)->getIntegerBitWidth());
+
+ Value *LHS = getNextOperand();
+ Value *RHS = getNextOperand();
+
+ LHS = Builder->CreateZExt(LHS, ExtType);
+ RHS = Builder->CreateZExt(RHS, ExtType);
+ Value *Result = Builder->CreateMul(LHS, RHS);
+ Result = Builder->CreateLShr(Result, Result->getType()->getIntegerBitWidth() / 2);
+ Result = Builder->CreateTrunc(Result, ResEVT.getTypeForEVT(*Ctx));
+ registerResult(Result);
+ break;
+ }
+ case ISD::MULHS: {
+ Type *ExtType = IntegerType::get(*Ctx, 2 * ResEVT.getTypeForEVT(*Ctx)->getIntegerBitWidth());
+
+ Value *LHS = getNextOperand();
+ Value *RHS = getNextOperand();
+
+ LHS = Builder->CreateSExt(LHS, ExtType);
+ RHS = Builder->CreateSExt(RHS, ExtType);
+ Value *Result = Builder->CreateMul(LHS, RHS);
+ Result = Builder->CreateLShr(Result, Result->getType()->getIntegerBitWidth() / 2);
+ Result = Builder->CreateTrunc(Result, ResEVT.getTypeForEVT(*Ctx));
+ registerResult(Result);
+ break;
+ }
+ case ISD::BUILD_VECTOR:{
+ assert(ResEVT.getSimpleVT().isVector());
+ Value *Vector = Builder->getInt(APInt(ResEVT.getSimpleVT().getScalarSizeInBits() * ResEVT.getSimpleVT().getVectorNumElements(), 0));
+ Vector = Builder->CreateBitCast(Vector, ResEVT.getTypeForEVT(*Ctx));
+ registerResult(Vector);
+ break;
+ }
+ case ISD::INTRINSIC_WO_CHAIN: {
+ if (const ConstantInt *id = dyn_cast<const ConstantInt>(getNextOperand())) {
+ translateTargetIntrinsic(id->getZExtValue());
+ }
+ else {
+ llvm_unreachable("");
+ }
+ break;
+ }
+ case ISD::UABSDIFF: {
+ if (ResEVT.getSimpleVT().isVector()) {
+ Value *zero = Builder->getInt(APInt(ResEVT.getVectorElementType().getSizeInBits(), 0));
+ Value *minusOne = Builder->getInt(APInt(ResEVT.getVectorElementType().getSizeInBits(), -1));
+ Value *op1 = getNextOperand();
+ Value *op2 = getNextOperand();
+ Value *result = Builder->getInt(APInt(ResEVT.getSimpleVT().getSizeInBits(), 0));
+ result = Builder->CreateBitCast(result, op1->getType());
+ for (unsigned i = 0; i < ResEVT.getSimpleVT().getVectorNumElements(); ++i) {
+ Value *elem1 = Builder->CreateExtractElement(op1, i);
+ Value *elem2 = Builder->CreateExtractElement(op2, i);
+ Value *elemResult = Builder->CreateSub(elem1, elem2);
+ Value *elemPos = Builder->CreateICmpSGT(elemResult, zero);
+ elemResult = Builder->CreateSelect(elemPos, elemResult, Builder->CreateMul(elemResult, minusOne));
+ result = Builder->CreateInsertElement(result, elemResult, i);
+ }
+ registerResult(result);
+ } else {
+ Value *zero = Builder->getInt(APInt(ResEVT.getSizeInBits(), 0));
+ Value *minusOne = Builder->getInt(APInt(ResEVT.getSizeInBits(), -1));
+ Value *op1 = getNextOperand();
+ Value *op2 = getNextOperand();
+ Value *result = Builder->CreateSub(op1, op2);
+ Value *pos = Builder->CreateICmpSGT(result, zero);
+ result = Builder->CreateSelect(pos, result, Builder->CreateMul(result, minusOne));
+ registerResult(result);
+ }
+ break;
+ }
+ case ISD::UMAX: {
+ assert(ResEVT.getSimpleVT().isVector());
+ Value *op1 = getNextOperand();
+ Value *op2 = getNextOperand();
+ Value *result = Builder->getInt(APInt(ResEVT.getSizeInBits(), 0));
+ result = Builder->CreateBitCast(result, op1->getType());
+
+ for (unsigned i = 0; i < ResEVT.getVectorNumElements(); ++i) {
+ Value *elem1 = Builder->CreateExtractElement(op1, i);
+ Value *elem2 = Builder->CreateExtractElement(op2, i);
+ Value *cmp = Builder->CreateICmpUGT(elem1, elem2);
+ Value *resElem = Builder->CreateSelect(cmp, elem1, elem2);
+ result = Builder->CreateInsertElement(result, resElem, i);
+ }
+ registerResult(result);
+ break;
+ }
+ case ISD::SMAX: {
+ assert(ResEVT.getSimpleVT().isVector());
+ Value *op1 = getNextOperand();
+ Value *op2 = getNextOperand();
+ Value *result = Builder->getInt(APInt(ResEVT.getSizeInBits(), 0));
+ result = Builder->CreateBitCast(result, op1->getType());
+
+ for (unsigned i = 0; i < ResEVT.getVectorNumElements(); ++i) {
+ Value *elem1 = Builder->CreateExtractElement(op1, i);
+ Value *elem2 = Builder->CreateExtractElement(op2, i);
+ Value *cmp = Builder->CreateICmpSGT(elem1, elem2);
+ Value *resElem = Builder->CreateSelect(cmp, elem1, elem2);
+ result = Builder->CreateInsertElement(result, resElem, i);
+ }
+ registerResult(result);
+ break;
+ }
+ //TODO: check if this is always an extraction of the upper half of a vector
+ case ISD::EXTRACT_SUBVECTOR:
+ {
+ Value *vec = getNextOperand();
+ ConstantInt *constantInt = dyn_cast<ConstantInt>(getNextOperand());
+ assert(constantInt);
+// constantInt->dump();
+ Value *result = Builder->getInt(APInt(ResEVT.getSizeInBits(), 0));
+ result = Builder->CreateBitCast(result, ResEVT.getTypeForEVT(*Ctx));
+// if (constantInt->getZExtValue() == 2) {
+ for (unsigned i = 0; i < ResEVT.getVectorNumElements(); ++i) {
+ Value *elem = Builder->CreateExtractElement(vec, ResEVT.getVectorNumElements() + i);
+ result = Builder->CreateInsertElement(result, elem, i);
+ }
+// }
+ registerResult(result);
+ break;
+ }
+ case ISD::FMA:
+ {
+ Value *op1 = getNextOperand();
+ Value *op2 = getNextOperand();
+ Value *op3 = getNextOperand();
+
+ if (ResEVT.isVector()) {
+ for (unsigned i = 0; i < ResEVT.getVectorNumElements(); ++i) {
+ Value *elem1 = Builder->CreateExtractElement(op1, i);
+ Value *elem2 = Builder->CreateExtractElement(op2, i);
+ Value *elem3 = Builder->CreateExtractElement(op3, i);
+
+ Value *resElem = Builder->CreateFMul(elem1, elem2);
+ resElem = Builder->CreateFAdd(resElem, elem3);
+
+ op3 = Builder->CreateInsertElement(op3, resElem, i);
+ }
+ } else {
+ op3 = Builder->CreateFAdd(op3, Builder->CreateFMul(op1, op2));
+ }
+
+ registerResult(op3);
+ break;
+ }
+ case ISD::FMINNUM:
+ case ISD::FMAXNUM:
+ case ISD::FMINNAN:
+ case ISD::FMAXNAN:
+ {
+ if (ResEVT.isVector()) {
+ Value *vec1 = getNextOperand();
+ Value *vec2 = getNextOperand();
+ Value *res = Builder->getInt(APInt(ResEVT.getSizeInBits(), 0));
+ res = Builder->CreateBitCast(res, ResEVT.getTypeForEVT(*Ctx));
+
+ for (unsigned i = 0; i < ResEVT.getVectorNumElements(); ++i) {
+ Value *elem1 = Builder->CreateExtractElement(vec1, i);
+ Value *elem2 = Builder->CreateExtractElement(vec2, i);
+ Value *cmp = nullptr;
+ switch (Opcode){
+ default:
+ llvm_unreachable("");
+ case ISD::FMAXNUM:
+ case ISD::FMAXNAN:
+ {
+ cmp = Builder->CreateFCmpUGT(elem1, elem2);
+ break;
+ }
+ case ISD::FMINNUM:
+ case ISD::FMINNAN:
+ {
+ cmp = Builder->CreateFCmpULT(elem1, elem2);
+ break;
+ }
+ }
+ Value *resElem = Builder->CreateSelect(cmp, elem1, elem2);
+ res = Builder->CreateInsertElement(res, resElem, i);
+ }
+ registerResult(res);
+ } else {
+ Value *op1 = getNextOperand();
+ Value *op2 = getNextOperand();
+ Value *cmp = nullptr;
+ switch (Opcode) {
+ default:
+ llvm_unreachable("");
+ case ISD::FMAXNUM:
+ case ISD::FMAXNAN: {
+ cmp = Builder->CreateFCmpUGT(op1, op2);
+ break;
+ }
+ case ISD::FMINNUM:
+ case ISD::FMINNAN: {
+ cmp = Builder->CreateFCmpULT(op1, op2);
+ break;
+ }
+ }
+ Value *res = Builder->CreateSelect(cmp, op1, op2);
+ registerResult(res);
+ }
+ break;
+ }
+ case ISD::CTPOP: {
+ if (ResEVT.isVector()) {
+ Value *vec = getNextOperand();
+ Value *res = Builder->getInt(APInt(ResEVT.getSizeInBits(), 0));
+ res = Builder->CreateBitCast(res, ResEVT.getTypeForEVT(*Ctx));
+
+ for (unsigned i = 0; i < ResEVT.getVectorNumElements(); ++i) {
+ Value *elem = Builder->CreateExtractElement(vec, i);
+ Value *resElem = Builder->getInt(APInt(ResEVT.getVectorElementType().getScalarSizeInBits(), 0));
+ for (unsigned j = 0; j < ResEVT.getVectorElementType().getScalarSizeInBits(); ++j) {
+ Value *cmp = Builder->CreateAnd(elem, 1);
+ cmp = Builder->CreateICmpEQ(cmp, Builder->getInt(APInt(cmp->getType()->getScalarSizeInBits(), 1)));
+ resElem = Builder->CreateAdd(resElem, Builder->CreateSelect(cmp, Builder->getInt(APInt(ResEVT.getVectorElementType().getScalarSizeInBits(), 1)), Builder->getInt(APInt(ResEVT.getVectorElementType().getScalarSizeInBits(), 0))));
+ elem = Builder->CreateLShr(elem, 1);
+ }
+ res = Builder->CreateInsertElement(res, resElem, i);
+ }
+ registerResult(res);
+ } else {
+ llvm_unreachable("not handled");
+ }
+ break;
+ }
+ case ISD::ROTR: {
+ Value *op = getNextOperand();
+ Value *r = getNextOperand();
+ //TODO: perform rotate...
+ registerResult(op);
+ break;
+ }
+ case ISD::UMIN: {
+ Value *op1 = getNextOperand();
+ Value *op2 = getNextOperand();
+ std::vector<Value*> args;
+ args.push_back(op1);
+ args.push_back(op2);
+
+ std::vector<Type*> types;
+ types.push_back(op1->getType());
+
+ Value *result = Builder->CreateCall(Intrinsic::getDeclaration(TheModule, Intrinsic::aarch64_neon_umin, types), args);
+ registerResult(result);
+ break;
+ }
+ case ISD::SMIN: {
+ Value *op1 = getNextOperand();
+ Value *op2 = getNextOperand();
+ std::vector<Value*> args;
+ args.push_back(op1);
+ args.push_back(op2);
+
+ std::vector<Type*> types;
+ types.push_back(op1->getType());
+
+ Value *result = Builder->CreateCall(Intrinsic::getDeclaration(TheModule, Intrinsic::aarch64_neon_smin, types), args);
+ registerResult(result);
+ break;
+ }
+// case ISD::SMAX: {
+// Value *op1 = getNextOperand();
+// Value *op2 = getNextOperand();
+// std::vector<Value*> args;
+// args.push_back(op1);
+// args.push_back(op2);
+//
+// std::vector<Type*> types;
+// types.push_back(op1->getType());
+//
+// Value *result = Builder->CreateCall(Intrinsic::getDeclaration(TheModule, Intrinsic::aarch64_neon_smax, types), args);
+// registerResult(result);
+// break;
+// }
+// case ISD::UMAX: {
+// Value *op1 = getNextOperand();
+// Value *op2 = getNextOperand();
+// std::vector<Value*> args;
+// args.push_back(op1);
+// args.push_back(op2);
+//
+// std::vector<Type*> types;
+// types.push_back(op1->getType());
+//
+// Value *result = Builder->CreateCall(Intrinsic::getDeclaration(TheModule, Intrinsic::aarch64_neon_umax, types), args);
+// registerResult(result);
+// break;
+// }
+ default:
llvm_unreachable(
("Unknown opcode found in semantics: " + utostr(Opcode)).c_str());
}
diff --git a/lib/DC/DCRegisterSema.cpp b/lib/DC/DCRegisterSema.cpp
index d19bb69..9299e8a 100644
--- a/lib/DC/DCRegisterSema.cpp
+++ b/lib/DC/DCRegisterSema.cpp
@@ -18,6 +18,8 @@
#include "llvm/Support/raw_ostream.h"
#include <algorithm>
#include <dlfcn.h>
+#include <llvm/Target/TargetRegisterInfo.h>
+
using namespace llvm;
#define DEBUG_TYPE "dc-regsema"
@@ -113,8 +115,13 @@ void DCRegisterSema::saveAllLocalRegs(BasicBlock *BB, BasicBlock::iterator IP) {
DCIRBuilder LocalBuilder(BB, IP);
for (unsigned RI = 1, RE = getNumRegs(); RI != RE; ++RI) {
- if (!RegAllocas[RI])
- continue;
+ if (!RegAllocas[RI]) {
+ if (RI >= 199 && RI <= 207) {
+ createLocalValueForReg(RI);
+ } else {
+ continue;
+ }
+ }
int OffsetInSet = RegOffsetsInSet[RI];
if (OffsetInSet != -1)
LocalBuilder.CreateStore(LocalBuilder.CreateLoad(RegAllocas[RI]),
@@ -127,8 +134,13 @@ void DCRegisterSema::restoreLocalRegs(BasicBlock *BB, BasicBlock::iterator IP) {
Builder->SetInsertPoint(BB, IP);
for (unsigned RI = 1, RE = getNumRegs(); RI != RE; ++RI) {
- if (!RegAllocas[RI])
- continue;
+ if (!RegAllocas[RI]) {
+ if (RI >= 199 && RI <= 207) {
+ createLocalValueForReg(RI);
+ } else {
+ continue;
+ }
+ }
int OffsetInSet = RegOffsetsInSet[RI];
if (OffsetInSet != -1)
setReg(RI, Builder->CreateLoad(RegPtrs[RI]));
diff --git a/lib/DC/DCTranslator.cpp b/lib/DC/DCTranslator.cpp
index a3cc445..809e937 100644
--- a/lib/DC/DCTranslator.cpp
+++ b/lib/DC/DCTranslator.cpp
@@ -23,8 +23,147 @@
#include "llvm/Transforms/Utils/Cloning.h"
#include <algorithm>
#include <vector>
+#include <sstream>
+
+namespace llvm {
+class NonVolatileRegistersPass : public FunctionPass {
+ public:
+ static char ID;
+
+ NonVolatileRegistersPass() : FunctionPass(ID) { };
+
+ virtual bool runOnFunction(Function &F);
+
+ private:
+ bool hasCall(const BasicBlock &BB);
+ bool isNonVolatile(uint64_t Idx);
+ bool isStack(uint64_t Idx);
+ void replaceLoaded(Instruction *StoreInst);
+ };
+}
+
using namespace llvm;
+char NonVolatileRegistersPass::ID = 0;
+
+bool NonVolatileRegistersPass::runOnFunction(Function &F) {
+
+ if (F.isDeclaration() || F.isIntrinsic()) {
+ return false;
+ }
+ std::set<Value *> NonVolatileAndStackPointers;
+ std::set<Value *> NonVolatilePointers;
+
+ BasicBlock &Entry = F.getEntryBlock();
+ for (BasicBlock::iterator I_it = Entry.begin(); I_it != Entry.end(); ++I_it) {
+ if (I_it->getOpcode() == Instruction::GetElementPtr) {
+ if (ConstantInt *ConstIdx = dyn_cast<ConstantInt>(I_it->getOperand(2))) {
+ if (isNonVolatile(ConstIdx->getZExtValue())) {
+ NonVolatileAndStackPointers.insert(&*I_it);
+ NonVolatilePointers.insert(&*I_it);
+ } else if (isStack(ConstIdx->getZExtValue())) {
+ NonVolatileAndStackPointers.insert(&*I_it);
+ }
+ }
+ }
+ }
+
+ for (Function::iterator BB_it = F.begin(); BB_it != F.end(); ++BB_it) {
+ if (!hasCall(*BB_it))
+ continue;
+ for (BasicBlock::iterator I_it = BB_it->begin(); I_it != BB_it->end(); ++I_it) {
+ if (I_it->getOpcode() == Instruction::Store) {
+ std::set<Value *>::iterator S_it = NonVolatileAndStackPointers.find(I_it->getOperand(1));
+ if (S_it != NonVolatileAndStackPointers.end()) {
+ replaceLoaded(&*I_it);
+ }
+ }
+ }
+ }
+
+ std::set<Instruction*> toRemove;
+
+ for (auto &ptr : NonVolatilePointers) {
+
+ for (auto ptrUser : ptr->users()) {
+ if (StoreInst *storeInst = dyn_cast<StoreInst>(ptrUser)) {
+ toRemove.insert(storeInst);
+ }
+ }
+ }
+
+ for (auto &r : toRemove) {
+ r->dropAllReferences();
+ r->removeFromParent();
+// r->dump();
+ }
+ return true;
+}
+
+bool NonVolatileRegistersPass::hasCall(const BasicBlock &BB) {
+ for (BasicBlock::const_iterator I_it = BB.begin(); I_it != BB.end(); ++I_it) {
+ if (I_it->getOpcode() == Instruction::Call) {
+ return true;
+ }
+ }
+ return false;
+}
+
+bool NonVolatileRegistersPass::isNonVolatile(uint64_t Idx) {
+ switch (Idx) {
+ default:
+ break;
+ case 24:
+ case 25:
+ case 26:
+ case 27:
+ case 28:
+ case 29:
+ case 30:
+ case 31:
+ case 32:
+ case 33:
+ return true;
+ }
+ return false;
+}
+
+bool NonVolatileRegistersPass::isStack(uint64_t Idx) {
+ switch (Idx) {
+ default:
+ break;
+ case 3:
+ case 0:
+ return true;
+ }
+ return false;
+}
+
+void NonVolatileRegistersPass::replaceLoaded(Instruction *StoreInst) {
+ Value *Ptr = StoreInst->getOperand(1);
+ Value *V = StoreInst->getOperand(0);
+ if (!V)
+ StoreInst->dump();
+ assert(V);
+
+ BasicBlock *BB = StoreInst->getParent();
+ Instruction *Load = nullptr;
+ for (BasicBlock::iterator I_it = BB->begin(); I_it != BB->end(); ++I_it) {
+ if (I_it->getOpcode() == Instruction::Load && I_it->getOperand(0) == Ptr) {
+ Load = &*I_it;
+ }
+ }
+
+ if (!Load)
+ return;
+
+// for (Value::const_use_iterator U_it = Load->use_begin(); U_it != Load->use_end(); ++U_it) {
+//
+// }
+ if (Load != V)
+ Load->replaceAllUsesWith(V);
+}