From 1565070aadaa983df38f63711c2e7f52dd0e716f Mon Sep 17 00:00:00 2001 From: Angelo Jacobo Date: Sun, 22 May 2022 21:12:31 +0800 Subject: [PATCH] Update README.md --- README.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/README.md b/README.md index 11f3340..bfdb778 100644 --- a/README.md +++ b/README.md @@ -10,7 +10,7 @@ Inside the `rtl` folder are the following: - `rv32i_alu.v` = arithmetic logic unit [EXECUTE STAGE] - `rv32i_memoryaccess.v` = logic controller for data memory access [MEMORYACCESS STAGE] - `rv32i_writeback.v` = logic controller for determining the next `PC` and `rd` value [WRITEBACK STAGE] - - `rv32i_csr.v` = Zicsr extension module for all relevant CSRs [executes parallel to WRITEBACK STAGE] + - `rv32i_csr.v` = Zicsr extension module for all relevant CSRs [executes parallel to MEMORYACCESS STAGE] - `rv32i_soc_TB.v` = testbench for `rv32i_soc` Other files at the top directory: