MUX_4067.kicad_pcb

(kicad_pcb (version 20171130) (host pcbnew 5.1.6-c6e7f7d~87~ubuntu18.04.1)

  (general
    (thickness 1.6)
    (drawings 28)
    (tracks 120)
    (zones 0)
    (modules 5)
    (nets 25)
  )

  (page A4)
  (title_block
    (title "16-pin analog / digital multiplexor breakout board")
    (date 2020-09-01)
    (rev 0.2)
    (company 6r1d)
  )

  (layers
    (0 F.Cu signal)
    (31 B.Cu signal)
    (32 B.Adhes user)
    (33 F.Adhes user)
    (34 B.Paste user)
    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (40 Dwgs.User user)
    (41 Cmts.User user)
    (42 Eco1.User user)
    (43 Eco2.User user)
    (44 Edge.Cuts user)
    (45 Margin user)
    (46 B.CrtYd user)
    (47 F.CrtYd user)
    (48 B.Fab user)
    (49 F.Fab user)
  )

  (setup
    (last_trace_width 0.25)
    (trace_clearance 0.2)
    (zone_clearance 0.508)
    (zone_45_only no)
    (trace_min 0.2)
    (via_size 0.8)
    (via_drill 0.4)
    (via_min_size 0.4)
    (via_min_drill 0.3)
    (uvia_size 0.3)
    (uvia_drill 0.1)
    (uvias_allowed no)
    (uvia_min_size 0.2)
    (uvia_min_drill 0.1)
    (edge_width 0.05)
    (segment_width 0.2)
    (pcb_text_width 0.3)
    (pcb_text_size 1.5 1.5)
    (mod_edge_width 0.12)
    (mod_text_size 1 1)
    (mod_text_width 0.15)
    (pad_size 1.524 1.524)
    (pad_drill 0.762)
    (pad_to_mask_clearance 0.05)
    (aux_axis_origin 0 0)
    (visible_elements FFFFFF7F)
    (pcbplotparams
      (layerselection 0x010fc_ffffffff)
      (usegerberextensions false)
      (usegerberattributes true)
      (usegerberadvancedattributes true)
      (creategerberjobfile true)
      (excludeedgelayer true)
      (linewidth 0.100000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15.000000)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 1)
      (scaleselection 1)
      (outputdirectory ""))
  )

  (net 0 "")
  (net 1 VCC)
  (net 2 GND)
  (net 3 EN)
  (net 4 S0)
  (net 5 S1)
  (net 6 S2)
  (net 7 S3)
  (net 8 COM)
  (net 9 "Net-(J2-Pad1)")
  (net 10 "Net-(J2-Pad2)")
  (net 11 "Net-(J2-Pad3)")
  (net 12 "Net-(J2-Pad4)")
  (net 13 "Net-(J2-Pad5)")
  (net 14 "Net-(J2-Pad6)")
  (net 15 "Net-(J2-Pad7)")
  (net 16 "Net-(J2-Pad8)")
  (net 17 "Net-(J2-Pad9)")
  (net 18 "Net-(J2-Pad10)")
  (net 19 "Net-(J2-Pad11)")
  (net 20 "Net-(J2-Pad12)")
  (net 21 "Net-(J2-Pad13)")
  (net 22 "Net-(J2-Pad14)")
  (net 23 "Net-(J2-Pad15)")
  (net 24 "Net-(J2-Pad16)")

  (net_class Default "This is the default net class."
    (clearance 0.2)
    (trace_width 0.25)
    (via_dia 0.8)
    (via_drill 0.4)
    (uvia_dia 0.3)
    (uvia_drill 0.1)
    (add_net COM)
    (add_net EN)
    (add_net GND)
    (add_net "Net-(J2-Pad1)")
    (add_net "Net-(J2-Pad10)")
    (add_net "Net-(J2-Pad11)")
    (add_net "Net-(J2-Pad12)")
    (add_net "Net-(J2-Pad13)")
    (add_net "Net-(J2-Pad14)")
    (add_net "Net-(J2-Pad15)")
    (add_net "Net-(J2-Pad16)")
    (add_net "Net-(J2-Pad2)")
    (add_net "Net-(J2-Pad3)")
    (add_net "Net-(J2-Pad4)")
    (add_net "Net-(J2-Pad5)")
    (add_net "Net-(J2-Pad6)")
    (add_net "Net-(J2-Pad7)")
    (add_net "Net-(J2-Pad8)")
    (add_net "Net-(J2-Pad9)")
    (add_net S0)
    (add_net S1)
    (add_net S2)
    (add_net S3)
    (add_net VCC)
  )

  (module Capacitor_SMD:C_0805_2012Metric (layer F.Cu) (tedit 5B36C52B) (tstamp 5F3F832A)
    (at 21.5 24.75)
    (descr "Capacitor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator")
    (tags capacitor)
    (path /5F40B248)
    (attr smd)
    (fp_text reference C1 (at 0 -1.65) (layer F.SilkS) hide
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text value 0.1uF (at 0 1.65) (layer F.Fab) hide
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_line (start -1 0.6) (end -1 -0.6) (layer F.Fab) (width 0.1))
    (fp_line (start -1 -0.6) (end 1 -0.6) (layer F.Fab) (width 0.1))
    (fp_line (start 1 -0.6) (end 1 0.6) (layer F.Fab) (width 0.1))
    (fp_line (start 1 0.6) (end -1 0.6) (layer F.Fab) (width 0.1))
    (fp_line (start -0.258578 -0.71) (end 0.258578 -0.71) (layer F.SilkS) (width 0.12))
    (fp_line (start -0.258578 0.71) (end 0.258578 0.71) (layer F.SilkS) (width 0.12))
    (fp_line (start -1.68 0.95) (end -1.68 -0.95) (layer F.CrtYd) (width 0.05))
    (fp_line (start -1.68 -0.95) (end 1.68 -0.95) (layer F.CrtYd) (width 0.05))
    (fp_line (start 1.68 -0.95) (end 1.68 0.95) (layer F.CrtYd) (width 0.05))
    (fp_line (start 1.68 0.95) (end -1.68 0.95) (layer F.CrtYd) (width 0.05))
    (fp_text user %R (at 0 0 90) (layer F.Fab)
      (effects (font (size 0.5 0.5) (thickness 0.08)))
    )
    (pad 2 smd roundrect (at 0.9375 0) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 2 GND))
    (pad 1 smd roundrect (at -0.9375 0) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 1 VCC))
    (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module Connector_PinHeader_2.54mm:PinHeader_1x08_P2.54mm_Vertical (layer F.Cu) (tedit 59FED5CC) (tstamp 5F3F8346)
    (at 15.25 24.5)
    (descr "Through hole straight pin header, 1x08, 2.54mm pitch, single row")
    (tags "Through hole pin header THT 1x08 2.54mm single row")
    (path /5F4020EA)
    (fp_text reference J1 (at 0 -2.33) (layer F.SilkS) hide
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text value Conn_01x08 (at 0 20.11) (layer F.Fab) hide
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_line (start 1.8 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05))
    (fp_line (start 1.8 19.55) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05))
    (fp_line (start -1.8 19.55) (end 1.8 19.55) (layer F.CrtYd) (width 0.05))
    (fp_line (start -1.8 -1.8) (end -1.8 19.55) (layer F.CrtYd) (width 0.05))
    (fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12))
    (fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12))
    (fp_line (start -1.33 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12))
    (fp_line (start 1.33 1.27) (end 1.33 19.11) (layer F.SilkS) (width 0.12))
    (fp_line (start -1.33 1.27) (end -1.33 19.11) (layer F.SilkS) (width 0.12))
    (fp_line (start -1.33 19.11) (end 1.33 19.11) (layer F.SilkS) (width 0.12))
    (fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer F.Fab) (width 0.1))
    (fp_line (start -1.27 19.05) (end -1.27 -0.635) (layer F.Fab) (width 0.1))
    (fp_line (start 1.27 19.05) (end -1.27 19.05) (layer F.Fab) (width 0.1))
    (fp_line (start 1.27 -1.27) (end 1.27 19.05) (layer F.Fab) (width 0.1))
    (fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1))
    (fp_text user %R (at 0 8.89 90) (layer F.Fab) hide
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 2 GND))
    (pad 2 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 1 VCC))
    (pad 3 thru_hole oval (at 0 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 3 EN))
    (pad 4 thru_hole oval (at 0 7.62) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 4 S0))
    (pad 5 thru_hole oval (at 0 10.16) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 5 S1))
    (pad 6 thru_hole oval (at 0 12.7) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 6 S2))
    (pad 7 thru_hole oval (at 0 15.24) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 7 S3))
    (pad 8 thru_hole oval (at 0 17.78) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 8 COM))
    (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x08_P2.54mm_Vertical.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module Connector_PinHeader_2.54mm:PinHeader_1x16_P2.54mm_Vertical (layer F.Cu) (tedit 59FED5CC) (tstamp 5F3F836A)
    (at 37 14.75)
    (descr "Through hole straight pin header, 1x16, 2.54mm pitch, single row")
    (tags "Through hole pin header THT 1x16 2.54mm single row")
    (path /5F3F7113)
    (fp_text reference J2 (at 0 -2.33) (layer F.SilkS) hide
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text value Conn_01x16 (at 0 40.43) (layer F.Fab) hide
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_line (start 1.8 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05))
    (fp_line (start 1.8 39.9) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05))
    (fp_line (start -1.8 39.9) (end 1.8 39.9) (layer F.CrtYd) (width 0.05))
    (fp_line (start -1.8 -1.8) (end -1.8 39.9) (layer F.CrtYd) (width 0.05))
    (fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12))
    (fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12))
    (fp_line (start -1.33 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12))
    (fp_line (start 1.33 1.27) (end 1.33 39.43) (layer F.SilkS) (width 0.12))
    (fp_line (start -1.33 1.27) (end -1.33 39.43) (layer F.SilkS) (width 0.12))
    (fp_line (start -1.33 39.43) (end 1.33 39.43) (layer F.SilkS) (width 0.12))
    (fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer F.Fab) (width 0.1))
    (fp_line (start -1.27 39.37) (end -1.27 -0.635) (layer F.Fab) (width 0.1))
    (fp_line (start 1.27 39.37) (end -1.27 39.37) (layer F.Fab) (width 0.1))
    (fp_line (start 1.27 -1.27) (end 1.27 39.37) (layer F.Fab) (width 0.1))
    (fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1))
    (fp_text user %R (at 0 19.05 90) (layer F.Fab) hide
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 9 "Net-(J2-Pad1)"))
    (pad 2 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 10 "Net-(J2-Pad2)"))
    (pad 3 thru_hole oval (at 0 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 11 "Net-(J2-Pad3)"))
    (pad 4 thru_hole oval (at 0 7.62) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 12 "Net-(J2-Pad4)"))
    (pad 5 thru_hole oval (at 0 10.16) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 13 "Net-(J2-Pad5)"))
    (pad 6 thru_hole oval (at 0 12.7) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 14 "Net-(J2-Pad6)"))
    (pad 7 thru_hole oval (at 0 15.24) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 15 "Net-(J2-Pad7)"))
    (pad 8 thru_hole oval (at 0 17.78) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 16 "Net-(J2-Pad8)"))
    (pad 9 thru_hole oval (at 0 20.32) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 17 "Net-(J2-Pad9)"))
    (pad 10 thru_hole oval (at 0 22.86) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 18 "Net-(J2-Pad10)"))
    (pad 11 thru_hole oval (at 0 25.4) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 19 "Net-(J2-Pad11)"))
    (pad 12 thru_hole oval (at 0 27.94) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 20 "Net-(J2-Pad12)"))
    (pad 13 thru_hole oval (at 0 30.48) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 21 "Net-(J2-Pad13)"))
    (pad 14 thru_hole oval (at 0 33.02) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 22 "Net-(J2-Pad14)"))
    (pad 15 thru_hole oval (at 0 35.56) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 23 "Net-(J2-Pad15)"))
    (pad 16 thru_hole oval (at 0 38.1) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
      (net 24 "Net-(J2-Pad16)"))
    (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x16_P2.54mm_Vertical.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module Resistor_SMD:R_0805_2012Metric (layer F.Cu) (tedit 5B36C52B) (tstamp 5F3F837B)
    (at 21.5 27.25)
    (descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator")
    (tags resistor)
    (path /5F40AEA9)
    (attr smd)
    (fp_text reference R1 (at 0 -1.65) (layer F.SilkS) hide
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text value 10k (at 0 1.65) (layer F.Fab) hide
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_line (start 1.68 0.95) (end -1.68 0.95) (layer F.CrtYd) (width 0.05))
    (fp_line (start 1.68 -0.95) (end 1.68 0.95) (layer F.CrtYd) (width 0.05))
    (fp_line (start -1.68 -0.95) (end 1.68 -0.95) (layer F.CrtYd) (width 0.05))
    (fp_line (start -1.68 0.95) (end -1.68 -0.95) (layer F.CrtYd) (width 0.05))
    (fp_line (start -0.258578 0.71) (end 0.258578 0.71) (layer F.SilkS) (width 0.12))
    (fp_line (start -0.258578 -0.71) (end 0.258578 -0.71) (layer F.SilkS) (width 0.12))
    (fp_line (start 1 0.6) (end -1 0.6) (layer F.Fab) (width 0.1))
    (fp_line (start 1 -0.6) (end 1 0.6) (layer F.Fab) (width 0.1))
    (fp_line (start -1 -0.6) (end 1 -0.6) (layer F.Fab) (width 0.1))
    (fp_line (start -1 0.6) (end -1 -0.6) (layer F.Fab) (width 0.1))
    (fp_text user %R (at 0 0 90) (layer F.Fab)
      (effects (font (size 0.5 0.5) (thickness 0.08)))
    )
    (pad 1 smd roundrect (at -0.9375 0) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 3 EN))
    (pad 2 smd roundrect (at 0.9375 0) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
      (net 2 GND))
    (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module Package_SO:SSOP-24_5.3x8.2mm_P0.65mm (layer F.Cu) (tedit 5A02F25C) (tstamp 5F3F8952)
    (at 26.075001 33.75 270)
    (descr "24-Lead Plastic Shrink Small Outline (SS)-5.30 mm Body [SSOP] (see Microchip Packaging Specification 00000049BS.pdf)")
    (tags "SSOP 0.65")
    (path /5F3F31DD)
    (attr smd)
    (fp_text reference U1 (at 0 0.075001 90) (layer F.SilkS) hide
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text value CD74HC4067SM (at 0 5.25 90) (layer F.Fab) hide
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_line (start -2.875 -4.1) (end -4.475 -4.1) (layer F.SilkS) (width 0.15))
    (fp_line (start -2.875 4.325) (end 2.875 4.325) (layer F.SilkS) (width 0.15))
    (fp_line (start -2.875 -4.325) (end 2.875 -4.325) (layer F.SilkS) (width 0.15))
    (fp_line (start -2.875 4.325) (end -2.875 4.025) (layer F.SilkS) (width 0.15))
    (fp_line (start 2.875 4.325) (end 2.875 4.025) (layer F.SilkS) (width 0.15))
    (fp_line (start 2.875 -4.325) (end 2.875 -4.025) (layer F.SilkS) (width 0.15))
    (fp_line (start -2.875 -4.325) (end -2.875 -4.1) (layer F.SilkS) (width 0.15))
    (fp_line (start -4.75 4.5) (end 4.75 4.5) (layer F.CrtYd) (width 0.05))
    (fp_line (start -4.75 -4.5) (end 4.75 -4.5) (layer F.CrtYd) (width 0.05))
    (fp_line (start 4.75 -4.5) (end 4.75 4.5) (layer F.CrtYd) (width 0.05))
    (fp_line (start -4.75 -4.5) (end -4.75 4.5) (layer F.CrtYd) (width 0.05))
    (fp_line (start -2.65 -3.1) (end -1.65 -4.1) (layer F.Fab) (width 0.15))
    (fp_line (start -2.65 4.1) (end -2.65 -3.1) (layer F.Fab) (width 0.15))
    (fp_line (start 2.65 4.1) (end -2.65 4.1) (layer F.Fab) (width 0.15))
    (fp_line (start 2.65 -4.1) (end 2.65 4.1) (layer F.Fab) (width 0.15))
    (fp_line (start -1.65 -4.1) (end 2.65 -4.1) (layer F.Fab) (width 0.15))
    (fp_text user %R (at 0 0 90) (layer F.Fab) hide
      (effects (font (size 0.8 0.8) (thickness 0.15)))
    )
    (pad 1 smd rect (at -3.6 -3.575 270) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask)
      (net 8 COM))
    (pad 2 smd rect (at -3.6 -2.925 270) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask)
      (net 16 "Net-(J2-Pad8)"))
    (pad 3 smd rect (at -3.6 -2.275 270) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask)
      (net 15 "Net-(J2-Pad7)"))
    (pad 4 smd rect (at -3.6 -1.625 270) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask)
      (net 14 "Net-(J2-Pad6)"))
    (pad 5 smd rect (at -3.6 -0.975 270) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask)
      (net 13 "Net-(J2-Pad5)"))
    (pad 6 smd rect (at -3.6 -0.325 270) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask)
      (net 12 "Net-(J2-Pad4)"))
    (pad 7 smd rect (at -3.6 0.325 270) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask)
      (net 11 "Net-(J2-Pad3)"))
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